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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-22 20:23:57 +08:00

misc: pci_endpoint_test: Add support for PCI_ENDPOINT_TEST regs to be mapped to any BAR

pci_endpoint_test driver assumes the PCI_ENDPOINT_TEST registers will
always be mapped to BAR_0. This need not always be the case like in TI's
K2G where BAR_0 is mapped to PCI controller application registers.

Add support so that PCI_ENDPOINT_TEST registers can be mapped to any BAR.
Change the bar_size used for BAR test accordingly.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Kishon Vijay Abraham I 2017-08-18 20:28:05 +05:30 committed by Bjorn Helgaas
parent 1d36eb58c3
commit 834b905199

View File

@ -90,9 +90,14 @@ struct pci_endpoint_test {
/* mutex to protect the ioctls */ /* mutex to protect the ioctls */
struct mutex mutex; struct mutex mutex;
struct miscdevice miscdev; struct miscdevice miscdev;
enum pci_barno test_reg_bar;
}; };
static int bar_size[] = { 4, 512, 1024, 16384, 131072, 1048576 }; struct pci_endpoint_test_data {
enum pci_barno test_reg_bar;
};
static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test, static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
u32 offset) u32 offset)
@ -147,6 +152,9 @@ static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
size = bar_size[barno]; size = bar_size[barno];
if (barno == test->test_reg_bar)
size = 0x4;
for (j = 0; j < size; j += 4) for (j = 0; j < size; j += 4)
pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0); pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
@ -390,6 +398,8 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
void __iomem *base; void __iomem *base;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct pci_endpoint_test *test; struct pci_endpoint_test *test;
struct pci_endpoint_test_data *data;
enum pci_barno test_reg_bar = BAR_0;
struct miscdevice *misc_device; struct miscdevice *misc_device;
if (pci_is_bridge(pdev)) if (pci_is_bridge(pdev))
@ -399,7 +409,13 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
if (!test) if (!test)
return -ENOMEM; return -ENOMEM;
test->test_reg_bar = 0;
test->pdev = pdev; test->pdev = pdev;
data = (struct pci_endpoint_test_data *)ent->driver_data;
if (data)
test_reg_bar = data->test_reg_bar;
init_completion(&test->irq_raised); init_completion(&test->irq_raised);
mutex_init(&test->mutex); mutex_init(&test->mutex);
@ -441,14 +457,15 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
base = pci_ioremap_bar(pdev, bar); base = pci_ioremap_bar(pdev, bar);
if (!base) { if (!base) {
dev_err(dev, "failed to read BAR%d\n", bar); dev_err(dev, "failed to read BAR%d\n", bar);
WARN_ON(bar == BAR_0); WARN_ON(bar == test_reg_bar);
} }
test->bar[bar] = base; test->bar[bar] = base;
} }
test->base = test->bar[0]; test->base = test->bar[test_reg_bar];
if (!test->base) { if (!test->base) {
dev_err(dev, "Cannot perform PCI test without BAR0\n"); dev_err(dev, "Cannot perform PCI test without BAR%d\n",
test_reg_bar);
goto err_iounmap; goto err_iounmap;
} }