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https://github.com/edk2-porting/linux-next.git
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[POWERPC] Remove update_bridge_resource
The 85xx/86xx pci code no longer uses update_bridge_resource and it was the only caller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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parent
72b122cc30
commit
82f0183ef3
@ -94,64 +94,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
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void __init
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update_bridge_resource(struct pci_dev *dev, struct resource *res)
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{
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u8 io_base_lo, io_limit_lo;
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u16 mem_base, mem_limit;
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u16 cmd;
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resource_size_t start, end, off;
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struct pci_controller *hose = dev->sysdata;
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if (!hose) {
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printk("update_bridge_base: no hose?\n");
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return;
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}
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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pci_write_config_word(dev, PCI_COMMAND,
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cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
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if (res->flags & IORESOURCE_IO) {
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off = (unsigned long) hose->io_base_virt - isa_io_base;
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start = res->start - off;
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end = res->end - off;
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io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
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io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
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if (end > 0xffff)
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io_base_lo |= PCI_IO_RANGE_TYPE_32;
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else
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io_base_lo |= PCI_IO_RANGE_TYPE_16;
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pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
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start >> 16);
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pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
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end >> 16);
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pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
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pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
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} else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
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== IORESOURCE_MEM) {
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off = hose->pci_mem_offset;
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mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
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mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
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pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
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pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
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} else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
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== (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
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off = hose->pci_mem_offset;
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mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
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mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
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pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
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pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
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} else {
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DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n",
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pci_name(dev), res->flags);
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}
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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#ifdef CONFIG_PPC_OF
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/*
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* Functions below are used on OpenFirmware machines.
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@ -152,9 +152,6 @@ extern void setup_indirect_pci(struct pci_controller* hose,
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resource_size_t cfg_addr,
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resource_size_t cfg_data, u32 flags);
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extern void setup_grackle(struct pci_controller *hose);
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extern void __init update_bridge_resource(struct pci_dev *dev,
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struct resource *res);
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#else /* CONFIG_PPC64 */
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/*
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