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spi: sirf: correct TXFIFO empty interrupt status bit
the old code uses wrong marco - SIRFSOC_SPI_FIFO_FULL is not for FIFO interrupt status, it is for FIFO status. here in the ISR, SIRFSOC_SPI_TXFIFO_EMPTY is the right bit for SPI TXFIFO interrupt status. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
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sspi->left_rx_word)
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sspi->rx_word(sspi);
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if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY
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| SIRFSOC_SPI_TXFIFO_THD_REACH))
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if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
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SIRFSOC_SPI_TXFIFO_THD_REACH))
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while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
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& SIRFSOC_SPI_FIFO_FULL)) &&
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sspi->left_tx_word)
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