2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-16 09:13:55 +08:00

Linux 5.9-rc5

-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl9epdgeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG9IMH/jHCRSbcsIXHuQHn
 xcRLlhrDHfXoBza7auHfPWx2+9DZsmaSJs/SEiTGNag0Bi7jBcWcwBpsep7iVG/+
 WiftD5uOMhZigyuvfMFrt0mjr2Kr3wg5p58lwMBeBdm8iL5uKV8ehKsh05/Fral2
 6hu3jP8L0PCZMpF+sZ7s2jlhfVUMmjA8VzXZCvgQtmhoraHiF3mzfkcSMxnHwBPO
 HLo+TDDm49u+LbVsJT7+cSTiWxuUJCbix9Q4PCTx/BGg4ezYsjc6v0BnYRaYtrrA
 1uYiT6PVBEUkYYBHKQlD3N2KnUmbKx7dGUF4t+peTg5/JiocAJMNi1N9Qzvv7N6Q
 CqTiuio=
 =q+kJ
 -----END PGP SIGNATURE-----

Merge v5.9-rc5 into drm-next

Paul needs 1a21e5b930 ("drm/ingenic: Fix leak of device_node
pointer") and 3b5b005ef7 ("drm/ingenic: Fix driver not probing when
IPU port is missing") from -fixes to be able to merge further ingenic
patches into -next.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2020-09-14 17:19:11 +02:00
commit 818280d5ad
208 changed files with 1468 additions and 866 deletions

View File

@ -308,6 +308,7 @@ Tony Luck <tony.luck@intel.com>
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org> TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn> TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com> Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws>
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Uwe Kleine-König <ukl@pengutronix.de> Uwe Kleine-König <ukl@pengutronix.de>
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>

View File

@ -156,7 +156,6 @@ against. Possible keywords are:::
``line-range`` cannot contain space, e.g. ``line-range`` cannot contain space, e.g.
"1-30" is valid range but "1 - 30" is not. "1-30" is valid range but "1 - 30" is not.
``module=foo`` combined keyword=value form is interchangably accepted
The meanings of each keyword are: The meanings of each keyword are:

View File

@ -23,8 +23,8 @@ Required properties:
- compatible: - compatible:
Must be one of : Must be one of :
"brcm,spi-bcm-qspi", "brcm,spi-brcmstb-qspi" : MSPI+BSPI on BRCMSTB SoCs "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
"brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi" : Second Instance of MSPI
BRCMSTB SoCs BRCMSTB SoCs
"brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI "brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
BRCMSTB SoCs BRCMSTB SoCs
@ -36,8 +36,8 @@ Required properties:
BRCMSTB SoCs BRCMSTB SoCs
"brcm,spi-bcm7278-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI "brcm,spi-bcm7278-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
BRCMSTB SoCs BRCMSTB SoCs
"brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi" : MSPI+BSPI on Cygnus, NSP "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on Cygnus, NSP
"brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi" : NS2 SoCs "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi" : NS2 SoCs
- reg: - reg:
Define the bases and ranges of the associated I/O address spaces. Define the bases and ranges of the associated I/O address spaces.
@ -86,7 +86,7 @@ BRCMSTB SoC Example:
spi@f03e3400 { spi@f03e3400 {
#address-cells = <0x1>; #address-cells = <0x1>;
#size-cells = <0x0>; #size-cells = <0x0>;
compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-brcmstb-qspi"; compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";
reg = <0xf03e0920 0x4 0xf03e3400 0x188 0xf03e3200 0x50>; reg = <0xf03e0920 0x4 0xf03e3400 0x188 0xf03e3200 0x50>;
reg-names = "cs_reg", "mspi", "bspi"; reg-names = "cs_reg", "mspi", "bspi";
interrupts = <0x6 0x5 0x4 0x3 0x2 0x1 0x0>; interrupts = <0x6 0x5 0x4 0x3 0x2 0x1 0x0>;
@ -149,7 +149,7 @@ BRCMSTB SoC Example:
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&upg_fixed>; clocks = <&upg_fixed>;
compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-brcmstb-mspi"; compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";
reg = <0xf0416000 0x180>; reg = <0xf0416000 0x180>;
reg-names = "mspi"; reg-names = "mspi";
interrupts = <0x14>; interrupts = <0x14>;
@ -160,7 +160,7 @@ BRCMSTB SoC Example:
iProc SoC Example: iProc SoC Example:
qspi: spi@18027200 { qspi: spi@18027200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x18027200 0x184>, reg = <0x18027200 0x184>,
<0x18027000 0x124>, <0x18027000 0x124>,
<0x1811c408 0x004>, <0x1811c408 0x004>,
@ -191,7 +191,7 @@ iProc SoC Example:
NS2 SoC Example: NS2 SoC Example:
qspi: spi@66470200 { qspi: spi@66470200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi"; compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
reg = <0x66470200 0x184>, reg = <0x66470200 0x184>,
<0x66470000 0x124>, <0x66470000 0x124>,
<0x67017408 0x004>, <0x67017408 0x004>,

View File

@ -179,7 +179,7 @@ DMA Fence uABI/Sync File
:internal: :internal:
Indefinite DMA Fences Indefinite DMA Fences
~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~
At various times &dma_fence with an indefinite time until dma_fence_wait() At various times &dma_fence with an indefinite time until dma_fence_wait()
finishes have been proposed. Examples include: finishes have been proposed. Examples include:

View File

@ -6130,7 +6130,7 @@ HvCallSendSyntheticClusterIpi, HvCallSendSyntheticClusterIpiEx.
8.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH 8.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH
----------------------------------- -----------------------------------
:Architecture: x86 :Architectures: x86
This capability indicates that KVM running on top of Hyper-V hypervisor This capability indicates that KVM running on top of Hyper-V hypervisor
enables Direct TLB flush for its guests meaning that TLB flush enables Direct TLB flush for its guests meaning that TLB flush
@ -6143,19 +6143,33 @@ in CPUID and only exposes Hyper-V identification. In this case, guest
thinks it's running on Hyper-V and only use Hyper-V hypercalls. thinks it's running on Hyper-V and only use Hyper-V hypercalls.
8.22 KVM_CAP_S390_VCPU_RESETS 8.22 KVM_CAP_S390_VCPU_RESETS
-----------------------------
Architectures: s390 :Architectures: s390
This capability indicates that the KVM_S390_NORMAL_RESET and This capability indicates that the KVM_S390_NORMAL_RESET and
KVM_S390_CLEAR_RESET ioctls are available. KVM_S390_CLEAR_RESET ioctls are available.
8.23 KVM_CAP_S390_PROTECTED 8.23 KVM_CAP_S390_PROTECTED
---------------------------
Architecture: s390 :Architectures: s390
This capability indicates that the Ultravisor has been initialized and This capability indicates that the Ultravisor has been initialized and
KVM can therefore start protected VMs. KVM can therefore start protected VMs.
This capability governs the KVM_S390_PV_COMMAND ioctl and the This capability governs the KVM_S390_PV_COMMAND ioctl and the
KVM_MP_STATE_LOAD MP_STATE. KVM_SET_MP_STATE can fail for protected KVM_MP_STATE_LOAD MP_STATE. KVM_SET_MP_STATE can fail for protected
guests when the state change is invalid. guests when the state change is invalid.
8.24 KVM_CAP_STEAL_TIME
-----------------------
:Architectures: arm64, x86
This capability indicates that KVM supports steal time accounting.
When steal time accounting is supported it may be enabled with
architecture-specific interfaces. This capability and the architecture-
specific interfaces must be consistent, i.e. if one says the feature
is supported, than the other should as well and vice versa. For arm64
see Documentation/virt/kvm/devices/vcpu.rst "KVM_ARM_VCPU_PVTIME_CTRL".
For x86 see Documentation/virt/kvm/msr.rst "MSR_KVM_STEAL_TIME".

View File

@ -6908,6 +6908,14 @@ L: linuxppc-dev@lists.ozlabs.org
S: Maintained S: Maintained
F: drivers/dma/fsldma.* F: drivers/dma/fsldma.*
FREESCALE DSPI DRIVER
M: Vladimir Oltean <olteanv@gmail.com>
L: linux-spi@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
F: drivers/spi/spi-fsl-dspi.c
F: include/linux/spi/spi-fsl-dspi.h
FREESCALE ENETC ETHERNET DRIVERS FREESCALE ENETC ETHERNET DRIVERS
M: Claudiu Manoil <claudiu.manoil@nxp.com> M: Claudiu Manoil <claudiu.manoil@nxp.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
@ -9799,7 +9807,7 @@ F: drivers/scsi/53c700*
LEAKING_ADDRESSES LEAKING_ADDRESSES
M: Tobin C. Harding <me@tobin.cc> M: Tobin C. Harding <me@tobin.cc>
M: Tycho Andersen <tycho@tycho.ws> M: Tycho Andersen <tycho@tycho.pizza>
L: kernel-hardening@lists.openwall.com L: kernel-hardening@lists.openwall.com
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tobin/leaks.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/tobin/leaks.git
@ -15576,6 +15584,7 @@ F: include/uapi/linux/sed*
SECURITY CONTACT SECURITY CONTACT
M: Security Officers <security@kernel.org> M: Security Officers <security@kernel.org>
S: Supported S: Supported
F: Documentation/admin-guide/security-bugs.rst
SECURITY SUBSYSTEM SECURITY SUBSYSTEM
M: James Morris <jmorris@namei.org> M: James Morris <jmorris@namei.org>

View File

@ -2,7 +2,7 @@
VERSION = 5 VERSION = 5
PATCHLEVEL = 9 PATCHLEVEL = 9
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc4 EXTRAVERSION = -rc5
NAME = Kleptomaniac Octopus NAME = Kleptomaniac Octopus
# *DOCUMENTATION* # *DOCUMENTATION*

View File

@ -217,7 +217,7 @@
}; };
qspi: spi@27200 { qspi: spi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x027200 0x184>, reg = <0x027200 0x184>,
<0x027000 0x124>, <0x027000 0x124>,
<0x11c408 0x004>, <0x11c408 0x004>,

View File

@ -284,7 +284,7 @@
}; };
qspi: spi@27200 { qspi: spi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x027200 0x184>, reg = <0x027200 0x184>,
<0x027000 0x124>, <0x027000 0x124>,
<0x11c408 0x004>, <0x11c408 0x004>,

View File

@ -488,7 +488,7 @@
}; };
spi@18029200 { spi@18029200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x18029200 0x184>, reg = <0x18029200 0x184>,
<0x18029000 0x124>, <0x18029000 0x124>,
<0x1811b408 0x004>, <0x1811b408 0x004>,

View File

@ -13,7 +13,7 @@
backlight: backlight-lvds { backlight: backlight-lvds {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm3 0 20000>; pwms = <&pwm3 0 20000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>; default-brightness-level = <6>;
power-supply = <&reg_lcd>; power-supply = <&reg_lcd>;

View File

@ -30,7 +30,7 @@
}; };
/* PRTWD2 rev 1 bitbang I2C for Ethernet Switch */ /* PRTWD2 rev 1 bitbang I2C for Ethernet Switch */
i2c@4 { i2c {
compatible = "i2c-gpio"; compatible = "i2c-gpio";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>; pinctrl-0 = <&pinctrl_i2c4>;

View File

@ -22,8 +22,6 @@
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb { user-pb {
label = "user_pb"; label = "user_pb";

View File

@ -1026,7 +1026,7 @@
#define MX6SX_PAD_QSPI1B_DQS__SIM_M_HADDR_15 0x01B0 0x04F8 0x0000 0x7 0x0 #define MX6SX_PAD_QSPI1B_DQS__SIM_M_HADDR_15 0x01B0 0x04F8 0x0000 0x7 0x0
#define MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK 0x01B4 0x04FC 0x0000 0x0 0x0 #define MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK 0x01B4 0x04FC 0x0000 0x0 0x0
#define MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX 0x01B4 0x04FC 0x0840 0x1 0x4 #define MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX 0x01B4 0x04FC 0x0840 0x1 0x4
#define MX6SX_PAD_QSPI1B_SCLK__UART3_DTE_TX 0x01B4 0x04FC 0x0000 0x0 0x0 #define MX6SX_PAD_QSPI1B_SCLK__UART3_DTE_TX 0x01B4 0x04FC 0x0000 0x1 0x0
#define MX6SX_PAD_QSPI1B_SCLK__ECSPI3_SCLK 0x01B4 0x04FC 0x0730 0x2 0x1 #define MX6SX_PAD_QSPI1B_SCLK__ECSPI3_SCLK 0x01B4 0x04FC 0x0730 0x2 0x1
#define MX6SX_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK 0x01B4 0x04FC 0x0780 0x3 0x2 #define MX6SX_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK 0x01B4 0x04FC 0x0780 0x3 0x2
#define MX6SX_PAD_QSPI1B_SCLK__CSI1_DATA_16 0x01B4 0x04FC 0x06DC 0x4 0x1 #define MX6SX_PAD_QSPI1B_SCLK__CSI1_DATA_16 0x01B4 0x04FC 0x06DC 0x4 0x1

View File

@ -58,7 +58,7 @@
<&clks IMX7D_ENET1_TIME_ROOT_CLK>; <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>; assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii"; phy-mode = "rgmii-id";
phy-handle = <&fec1_phy>; phy-handle = <&fec1_phy>;
status = "okay"; status = "okay";

View File

@ -394,7 +394,7 @@
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
<&pcc3 IMX7ULP_CLK_PCTLC>; <&pcc3 IMX7ULP_CLK_PCTLC>;
clock-names = "gpio", "port"; clock-names = "gpio", "port";
gpio-ranges = <&iomuxc1 0 0 32>; gpio-ranges = <&iomuxc1 0 0 20>;
}; };
gpio_ptd: gpio@40af0000 { gpio_ptd: gpio@40af0000 {
@ -408,7 +408,7 @@
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
<&pcc3 IMX7ULP_CLK_PCTLD>; <&pcc3 IMX7ULP_CLK_PCTLD>;
clock-names = "gpio", "port"; clock-names = "gpio", "port";
gpio-ranges = <&iomuxc1 0 32 32>; gpio-ranges = <&iomuxc1 0 32 12>;
}; };
gpio_pte: gpio@40b00000 { gpio_pte: gpio@40b00000 {
@ -422,7 +422,7 @@
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
<&pcc3 IMX7ULP_CLK_PCTLE>; <&pcc3 IMX7ULP_CLK_PCTLE>;
clock-names = "gpio", "port"; clock-names = "gpio", "port";
gpio-ranges = <&iomuxc1 0 64 32>; gpio-ranges = <&iomuxc1 0 64 16>;
}; };
gpio_ptf: gpio@40b10000 { gpio_ptf: gpio@40b10000 {
@ -436,7 +436,7 @@
clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>,
<&pcc3 IMX7ULP_CLK_PCTLF>; <&pcc3 IMX7ULP_CLK_PCTLF>;
clock-names = "gpio", "port"; clock-names = "gpio", "port";
gpio-ranges = <&iomuxc1 0 96 32>; gpio-ranges = <&iomuxc1 0 96 20>;
}; };
}; };

View File

@ -51,6 +51,8 @@
&mcbsp2 { &mcbsp2 {
status = "okay"; status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
}; };
&charger { &charger {
@ -102,35 +104,18 @@
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
}; };
lcd0: display@0 { lcd0: display {
compatible = "panel-dpi"; /* This isn't the exact LCD, but the timings meet spec */
label = "28"; compatible = "logicpd,type28";
status = "okay";
/* default-on; */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_pin>; pinctrl-0 = <&lcd_enable_pin>;
enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */ backlight = <&bl>;
enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
port { port {
lcd_in: endpoint { lcd_in: endpoint {
remote-endpoint = <&dpi_out>; remote-endpoint = <&dpi_out>;
}; };
}; };
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <3>;
hback-porch = <2>;
hsync-len = <42>;
vback-porch = <3>;
vfront-porch = <2>;
vsync-len = <11>;
hsync-active = <1>;
vsync-active = <1>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
bl: backlight { bl: backlight {

View File

@ -81,6 +81,8 @@
}; };
&mcbsp2 { &mcbsp2 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
status = "okay"; status = "okay";
}; };

View File

@ -182,7 +182,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>, reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x40000000>; <0x0 0x40000000 0x0 0x20000000>;
reg-names = "QuadSPI", "QuadSPI-memory"; reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "qspi_en", "qspi"; clock-names = "qspi_en", "qspi";

View File

@ -488,11 +488,11 @@
}; };
}; };
target-module@5000 { target-module@4000 {
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x5000 0x4>, reg = <0x4000 0x4>,
<0x5010 0x4>, <0x4010 0x4>,
<0x5014 0x4>; <0x4014 0x4>;
reg-names = "rev", "sysc", "syss"; reg-names = "rev", "sysc", "syss";
ti,sysc-sidle = <SYSC_IDLE_FORCE>, ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>, <SYSC_IDLE_NO>,
@ -504,7 +504,7 @@
ti,syss-mask = <1>; ti,syss-mask = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x5000 0x1000>; ranges = <0 0x4000 0x1000>;
dsi1: encoder@0 { dsi1: encoder@0 {
compatible = "ti,omap5-dsi"; compatible = "ti,omap5-dsi";
@ -514,8 +514,9 @@
reg-names = "proto", "phy", "pll"; reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
clock-names = "fck"; <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
}; };
}; };
@ -545,8 +546,9 @@
reg-names = "proto", "phy", "pll"; reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
clock-names = "fck"; <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
}; };
}; };

View File

@ -821,7 +821,7 @@
timer3: timer3@ffd00100 { timer3: timer3@ffd00100 {
compatible = "snps,dw-apb-timer"; compatible = "snps,dw-apb-timer";
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xffd01000 0x100>; reg = <0xffd00100 0x100>;
clocks = <&l4_sys_free_clk>; clocks = <&l4_sys_free_clk>;
clock-names = "timer"; clock-names = "timer";
resets = <&rst L4SYSTIMER1_RESET>; resets = <&rst L4SYSTIMER1_RESET>;

View File

@ -495,7 +495,7 @@
}; };
ocotp: ocotp@400a5000 { ocotp: ocotp@400a5000 {
compatible = "fsl,vf610-ocotp"; compatible = "fsl,vf610-ocotp", "syscon";
reg = <0x400a5000 0x1000>; reg = <0x400a5000 0x1000>;
clocks = <&clks VF610_CLK_OCOTP>; clocks = <&clks VF610_CLK_OCOTP>;
}; };

View File

@ -1,13 +1,11 @@
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MULTI_V4T=y CONFIG_ARCH_MULTI_V4T=y
CONFIG_ARCH_MULTI_V5=y CONFIG_ARCH_MULTI_V5=y
# CONFIG_ARCH_MULTI_V7 is not set # CONFIG_ARCH_MULTI_V7 is not set
@ -15,19 +13,17 @@ CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_INTEGRATOR_IMPD1=y CONFIG_INTEGRATOR_IMPD1=y
CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_PCI=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y CONFIG_AEABI=y
# CONFIG_ATAGS is not set # CONFIG_ATAGS is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp" CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp"
CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT=y
CONFIG_CMA=y CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
@ -37,6 +33,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_PCI=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_AFS_PARTS=y CONFIG_MTD_AFS_PARTS=y
@ -52,9 +49,12 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_E100=y CONFIG_E100=y
CONFIG_SMC91X=y CONFIG_SMC91X=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_SERIO_SERPORT is not set # CONFIG_SERIO_SERPORT is not set
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MODE_HELPERS=y

View File

@ -74,7 +74,7 @@ static struct powerdomain *_get_pwrdm(struct device *dev)
return pwrdm; return pwrdm;
clk = of_clk_get(dev->of_node->parent, 0); clk = of_clk_get(dev->of_node->parent, 0);
if (!clk) { if (IS_ERR(clk)) {
dev_err(dev, "no fck found\n"); dev_err(dev, "no fck found\n");
return NULL; return NULL;
} }

View File

@ -745,7 +745,7 @@
}; };
qspi: spi@66470200 { qspi: spi@66470200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi"; compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
reg = <0x66470200 0x184>, reg = <0x66470200 0x184>,
<0x66470000 0x124>, <0x66470000 0x124>,
<0x67017408 0x004>, <0x67017408 0x004>,

View File

@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb

View File

@ -702,7 +702,7 @@
reg = <0x30bd0000 0x10000>; reg = <0x30bd0000 0x10000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_SDMA1_ROOT>, clocks = <&clk IMX8MP_CLK_SDMA1_ROOT>,
<&clk IMX8MP_CLK_SDMA1_ROOT>; <&clk IMX8MP_CLK_AHB>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
#dma-cells = <3>; #dma-cells = <3>;
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";

View File

@ -423,7 +423,7 @@
tmu: tmu@30260000 { tmu: tmu@30260000 {
compatible = "fsl,imx8mq-tmu"; compatible = "fsl,imx8mq-tmu";
reg = <0x30260000 0x10000>; reg = <0x30260000 0x10000>;
interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_TMU_ROOT>; clocks = <&clk IMX8MQ_CLK_TMU_ROOT>;
little-endian; little-endian;
fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>; fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;

View File

@ -13,6 +13,7 @@
*/ */
#include <dt-bindings/power/xlnx-zynqmp-power.h> #include <dt-bindings/power/xlnx-zynqmp-power.h>
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
/ { / {
compatible = "xlnx,zynqmp"; compatible = "xlnx,zynqmp";
@ -558,6 +559,15 @@
}; };
}; };
psgtr: phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
status = "disabled";
reg = <0x0 0xfd400000 0x0 0x40000>,
<0x0 0xfd3d0000 0x0 0x1000>;
reg-names = "serdes", "siou";
#phy-cells = <4>;
};
rtc: rtc@ffa60000 { rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc"; compatible = "xlnx,zynqmp-rtc";
status = "disabled"; status = "disabled";
@ -601,7 +611,7 @@
power-domains = <&zynqmp_firmware PD_SD_1>; power-domains = <&zynqmp_firmware PD_SD_1>;
}; };
smmu: smmu@fd800000 { smmu: iommu@fd800000 {
compatible = "arm,mmu-500"; compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>; reg = <0x0 0xfd800000 0x0 0x20000>;
status = "disabled"; status = "disabled";

View File

@ -724,6 +724,17 @@ CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_USB_RENESAS_USB3=m CONFIG_USB_RENESAS_USB3=m
CONFIG_USB_TEGRA_XUDC=m CONFIG_USB_TEGRA_XUDC=m
CONFIG_USB_CONFIGFS=m
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_ACM=y
CONFIG_USB_CONFIGFS_OBEX=y
CONFIG_USB_CONFIGFS_NCM=y
CONFIG_USB_CONFIGFS_ECM=y
CONFIG_USB_CONFIGFS_ECM_SUBSET=y
CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_EEM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_TYPEC=m CONFIG_TYPEC=m
CONFIG_TYPEC_TCPM=m CONFIG_TYPEC_TCPM=m
CONFIG_TYPEC_FUSB302=m CONFIG_TYPEC_FUSB302=m
@ -914,6 +925,7 @@ CONFIG_ARCH_TEGRA_194_SOC=y
CONFIG_ARCH_K3_AM6_SOC=y CONFIG_ARCH_K3_AM6_SOC=y
CONFIG_ARCH_K3_J721E_SOC=y CONFIG_ARCH_K3_J721E_SOC=y
CONFIG_TI_SCI_PM_DOMAINS=y CONFIG_TI_SCI_PM_DOMAINS=y
CONFIG_EXTCON_PTN5150=m
CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USB_GPIO=y
CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_EXTCON_USBC_CROS_EC=y
CONFIG_IIO=y CONFIG_IIO=y

View File

@ -368,7 +368,6 @@ struct kvm_vcpu_arch {
/* Guest PV state */ /* Guest PV state */
struct { struct {
u64 steal;
u64 last_steal; u64 last_steal;
gpa_t base; gpa_t base;
} steal; } steal;
@ -544,6 +543,7 @@ long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu);
gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu);
void kvm_update_stolen_time(struct kvm_vcpu *vcpu); void kvm_update_stolen_time(struct kvm_vcpu *vcpu);
bool kvm_arm_pvtime_supported(void);
int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
struct kvm_device_attr *attr); struct kvm_device_attr *attr);
int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,

View File

@ -206,6 +206,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
*/ */
r = 1; r = 1;
break; break;
case KVM_CAP_STEAL_TIME:
r = kvm_arm_pvtime_supported();
break;
default: default:
r = kvm_arch_vm_ioctl_check_extension(kvm, ext); r = kvm_arch_vm_ioctl_check_extension(kvm, ext);
break; break;

View File

@ -1877,6 +1877,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
!fault_supports_stage2_huge_mapping(memslot, hva, vma_pagesize)) { !fault_supports_stage2_huge_mapping(memslot, hva, vma_pagesize)) {
force_pte = true; force_pte = true;
vma_pagesize = PAGE_SIZE; vma_pagesize = PAGE_SIZE;
vma_shift = PAGE_SHIFT;
} }
/* /*
@ -1970,7 +1971,12 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
(fault_status == FSC_PERM && (fault_status == FSC_PERM &&
stage2_is_exec(mmu, fault_ipa, vma_pagesize)); stage2_is_exec(mmu, fault_ipa, vma_pagesize));
if (vma_pagesize == PUD_SIZE) { /*
* If PUD_SIZE == PMD_SIZE, there is no real PUD level, and
* all we have is a 2-level page table. Trying to map a PUD in
* this case would be fatally wrong.
*/
if (PUD_SIZE != PMD_SIZE && vma_pagesize == PUD_SIZE) {
pud_t new_pud = kvm_pfn_pud(pfn, mem_type); pud_t new_pud = kvm_pfn_pud(pfn, mem_type);
new_pud = kvm_pud_mkhuge(new_pud); new_pud = kvm_pud_mkhuge(new_pud);

View File

@ -13,25 +13,22 @@
void kvm_update_stolen_time(struct kvm_vcpu *vcpu) void kvm_update_stolen_time(struct kvm_vcpu *vcpu)
{ {
struct kvm *kvm = vcpu->kvm; struct kvm *kvm = vcpu->kvm;
u64 steal;
__le64 steal_le;
u64 offset;
int idx;
u64 base = vcpu->arch.steal.base; u64 base = vcpu->arch.steal.base;
u64 last_steal = vcpu->arch.steal.last_steal;
u64 offset = offsetof(struct pvclock_vcpu_stolen_time, stolen_time);
u64 steal = 0;
int idx;
if (base == GPA_INVALID) if (base == GPA_INVALID)
return; return;
/* Let's do the local bookkeeping */
steal = vcpu->arch.steal.steal;
steal += current->sched_info.run_delay - vcpu->arch.steal.last_steal;
vcpu->arch.steal.last_steal = current->sched_info.run_delay;
vcpu->arch.steal.steal = steal;
steal_le = cpu_to_le64(steal);
idx = srcu_read_lock(&kvm->srcu); idx = srcu_read_lock(&kvm->srcu);
offset = offsetof(struct pvclock_vcpu_stolen_time, stolen_time); if (!kvm_get_guest(kvm, base + offset, steal)) {
kvm_put_guest(kvm, base + offset, steal_le, u64); steal = le64_to_cpu(steal);
vcpu->arch.steal.last_steal = READ_ONCE(current->sched_info.run_delay);
steal += vcpu->arch.steal.last_steal - last_steal;
kvm_put_guest(kvm, base + offset, cpu_to_le64(steal));
}
srcu_read_unlock(&kvm->srcu, idx); srcu_read_unlock(&kvm->srcu, idx);
} }
@ -43,7 +40,8 @@ long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu)
switch (feature) { switch (feature) {
case ARM_SMCCC_HV_PV_TIME_FEATURES: case ARM_SMCCC_HV_PV_TIME_FEATURES:
case ARM_SMCCC_HV_PV_TIME_ST: case ARM_SMCCC_HV_PV_TIME_ST:
val = SMCCC_RET_SUCCESS; if (vcpu->arch.steal.base != GPA_INVALID)
val = SMCCC_RET_SUCCESS;
break; break;
} }
@ -64,7 +62,6 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu)
* Start counting stolen time from the time the guest requests * Start counting stolen time from the time the guest requests
* the feature enabled. * the feature enabled.
*/ */
vcpu->arch.steal.steal = 0;
vcpu->arch.steal.last_steal = current->sched_info.run_delay; vcpu->arch.steal.last_steal = current->sched_info.run_delay;
idx = srcu_read_lock(&kvm->srcu); idx = srcu_read_lock(&kvm->srcu);
@ -74,7 +71,7 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu)
return base; return base;
} }
static bool kvm_arm_pvtime_supported(void) bool kvm_arm_pvtime_supported(void)
{ {
return !!sched_info_on(); return !!sched_info_on();
} }

View File

@ -23,7 +23,7 @@ TRACE_EVENT(kvm_entry,
__entry->vcpu_pc = vcpu_pc; __entry->vcpu_pc = vcpu_pc;
), ),
TP_printk("PC: 0x%08lx", __entry->vcpu_pc) TP_printk("PC: 0x%016lx", __entry->vcpu_pc)
); );
TRACE_EVENT(kvm_exit, TRACE_EVENT(kvm_exit,
@ -42,7 +42,7 @@ TRACE_EVENT(kvm_exit,
__entry->vcpu_pc = vcpu_pc; __entry->vcpu_pc = vcpu_pc;
), ),
TP_printk("%s: HSR_EC: 0x%04x (%s), PC: 0x%08lx", TP_printk("%s: HSR_EC: 0x%04x (%s), PC: 0x%016lx",
__print_symbolic(__entry->ret, kvm_arm_exception_type), __print_symbolic(__entry->ret, kvm_arm_exception_type),
__entry->esr_ec, __entry->esr_ec,
__print_symbolic(__entry->esr_ec, kvm_arm_exception_class), __print_symbolic(__entry->esr_ec, kvm_arm_exception_class),
@ -69,7 +69,7 @@ TRACE_EVENT(kvm_guest_fault,
__entry->ipa = ipa; __entry->ipa = ipa;
), ),
TP_printk("ipa %#llx, hsr %#08lx, hxfar %#08lx, pc %#08lx", TP_printk("ipa %#llx, hsr %#08lx, hxfar %#08lx, pc %#016lx",
__entry->ipa, __entry->hsr, __entry->ipa, __entry->hsr,
__entry->hxfar, __entry->vcpu_pc) __entry->hxfar, __entry->vcpu_pc)
); );
@ -131,7 +131,7 @@ TRACE_EVENT(kvm_mmio_emulate,
__entry->cpsr = cpsr; __entry->cpsr = cpsr;
), ),
TP_printk("Emulate MMIO at: 0x%08lx (instr: %08lx, cpsr: %08lx)", TP_printk("Emulate MMIO at: 0x%016lx (instr: %08lx, cpsr: %08lx)",
__entry->vcpu_pc, __entry->instr, __entry->cpsr) __entry->vcpu_pc, __entry->instr, __entry->cpsr)
); );
@ -149,7 +149,7 @@ TRACE_EVENT(kvm_unmap_hva_range,
__entry->end = end; __entry->end = end;
), ),
TP_printk("mmu notifier unmap range: %#08lx -- %#08lx", TP_printk("mmu notifier unmap range: %#016lx -- %#016lx",
__entry->start, __entry->end) __entry->start, __entry->end)
); );
@ -165,7 +165,7 @@ TRACE_EVENT(kvm_set_spte_hva,
__entry->hva = hva; __entry->hva = hva;
), ),
TP_printk("mmu notifier set pte hva: %#08lx", __entry->hva) TP_printk("mmu notifier set pte hva: %#016lx", __entry->hva)
); );
TRACE_EVENT(kvm_age_hva, TRACE_EVENT(kvm_age_hva,
@ -182,7 +182,7 @@ TRACE_EVENT(kvm_age_hva,
__entry->end = end; __entry->end = end;
), ),
TP_printk("mmu notifier age hva: %#08lx -- %#08lx", TP_printk("mmu notifier age hva: %#016lx -- %#016lx",
__entry->start, __entry->end) __entry->start, __entry->end)
); );
@ -198,7 +198,7 @@ TRACE_EVENT(kvm_test_age_hva,
__entry->hva = hva; __entry->hva = hva;
), ),
TP_printk("mmu notifier test age hva: %#08lx", __entry->hva) TP_printk("mmu notifier test age hva: %#016lx", __entry->hva)
); );
TRACE_EVENT(kvm_set_way_flush, TRACE_EVENT(kvm_set_way_flush,

View File

@ -22,7 +22,7 @@ TRACE_EVENT(kvm_wfx_arm64,
__entry->is_wfe = is_wfe; __entry->is_wfe = is_wfe;
), ),
TP_printk("guest executed wf%c at: 0x%08lx", TP_printk("guest executed wf%c at: 0x%016lx",
__entry->is_wfe ? 'e' : 'i', __entry->vcpu_pc) __entry->is_wfe ? 'e' : 'i', __entry->vcpu_pc)
); );
@ -42,7 +42,7 @@ TRACE_EVENT(kvm_hvc_arm64,
__entry->imm = imm; __entry->imm = imm;
), ),
TP_printk("HVC at 0x%08lx (r0: 0x%08lx, imm: 0x%lx)", TP_printk("HVC at 0x%016lx (r0: 0x%016lx, imm: 0x%lx)",
__entry->vcpu_pc, __entry->r0, __entry->imm) __entry->vcpu_pc, __entry->r0, __entry->imm)
); );
@ -135,7 +135,7 @@ TRACE_EVENT(trap_reg,
__entry->write_value = write_value; __entry->write_value = write_value;
), ),
TP_printk("%s %s reg %d (0x%08llx)", __entry->fn, __entry->is_write?"write to":"read from", __entry->reg, __entry->write_value) TP_printk("%s %s reg %d (0x%016llx)", __entry->fn, __entry->is_write?"write to":"read from", __entry->reg, __entry->write_value)
); );
TRACE_EVENT(kvm_handle_sys_reg, TRACE_EVENT(kvm_handle_sys_reg,

View File

@ -137,6 +137,8 @@ extern void kvm_init_loongson_ipi(struct kvm *kvm);
int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
{ {
switch (type) { switch (type) {
case KVM_VM_MIPS_AUTO:
break;
#ifdef CONFIG_KVM_MIPS_VZ #ifdef CONFIG_KVM_MIPS_VZ
case KVM_VM_MIPS_VZ: case KVM_VM_MIPS_VZ:
#else #else

View File

@ -165,19 +165,19 @@ struct __large_struct {
#define __get_user_nocheck(x, ptr, size) \ #define __get_user_nocheck(x, ptr, size) \
({ \ ({ \
long __gu_err, __gu_val; \ long __gu_err; \
__get_user_size(__gu_val, (ptr), (size), __gu_err); \ __get_user_size((x), (ptr), (size), __gu_err); \
(x) = (__force __typeof__(*(ptr)))__gu_val; \
__gu_err; \ __gu_err; \
}) })
#define __get_user_check(x, ptr, size) \ #define __get_user_check(x, ptr, size) \
({ \ ({ \
long __gu_err = -EFAULT, __gu_val = 0; \ long __gu_err = -EFAULT; \
const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
if (access_ok(__gu_addr, size)) \ if (access_ok(__gu_addr, size)) \
__get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ __get_user_size((x), __gu_addr, (size), __gu_err); \
(x) = (__force __typeof__(*(ptr)))__gu_val; \ else \
(x) = (__typeof__(*(ptr))) 0; \
__gu_err; \ __gu_err; \
}) })
@ -191,11 +191,13 @@ do { \
case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \ case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \
case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \ case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \
case 8: __get_user_asm2(x, ptr, retval); break; \ case 8: __get_user_asm2(x, ptr, retval); break; \
default: (x) = __get_user_bad(); \ default: (x) = (__typeof__(*(ptr)))__get_user_bad(); \
} \ } \
} while (0) } while (0)
#define __get_user_asm(x, addr, err, op) \ #define __get_user_asm(x, addr, err, op) \
{ \
unsigned long __gu_tmp; \
__asm__ __volatile__( \ __asm__ __volatile__( \
"1: "op" %1,0(%2)\n" \ "1: "op" %1,0(%2)\n" \
"2:\n" \ "2:\n" \
@ -209,10 +211,14 @@ do { \
" .align 2\n" \ " .align 2\n" \
" .long 1b,3b\n" \ " .long 1b,3b\n" \
".previous" \ ".previous" \
: "=r"(err), "=r"(x) \ : "=r"(err), "=r"(__gu_tmp) \
: "r"(addr), "i"(-EFAULT), "0"(err)) : "r"(addr), "i"(-EFAULT), "0"(err)); \
(x) = (__typeof__(*(addr)))__gu_tmp; \
}
#define __get_user_asm2(x, addr, err) \ #define __get_user_asm2(x, addr, err) \
{ \
unsigned long long __gu_tmp; \
__asm__ __volatile__( \ __asm__ __volatile__( \
"1: l.lwz %1,0(%2)\n" \ "1: l.lwz %1,0(%2)\n" \
"2: l.lwz %H1,4(%2)\n" \ "2: l.lwz %H1,4(%2)\n" \
@ -229,8 +235,11 @@ do { \
" .long 1b,4b\n" \ " .long 1b,4b\n" \
" .long 2b,4b\n" \ " .long 2b,4b\n" \
".previous" \ ".previous" \
: "=r"(err), "=&r"(x) \ : "=r"(err), "=&r"(__gu_tmp) \
: "r"(addr), "i"(-EFAULT), "0"(err)) : "r"(addr), "i"(-EFAULT), "0"(err)); \
(x) = (__typeof__(*(addr)))( \
(__typeof__((x)-(x)))__gu_tmp); \
}
/* more complex routines */ /* more complex routines */

View File

@ -80,6 +80,16 @@ static void __init setup_memory(void)
*/ */
memblock_reserve(__pa(_stext), _end - _stext); memblock_reserve(__pa(_stext), _end - _stext);
#ifdef CONFIG_BLK_DEV_INITRD
/* Then reserve the initrd, if any */
if (initrd_start && (initrd_end > initrd_start)) {
unsigned long aligned_start = ALIGN_DOWN(initrd_start, PAGE_SIZE);
unsigned long aligned_end = ALIGN(initrd_end, PAGE_SIZE);
memblock_reserve(__pa(aligned_start), aligned_end - aligned_start);
}
#endif /* CONFIG_BLK_DEV_INITRD */
early_init_fdt_reserve_self(); early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem(); early_init_fdt_scan_reserved_mem();

View File

@ -16,7 +16,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
static void cache_loop(struct page *page, const unsigned int reg) static __always_inline void cache_loop(struct page *page, const unsigned int reg)
{ {
unsigned long paddr = page_to_pfn(page) << PAGE_SHIFT; unsigned long paddr = page_to_pfn(page) << PAGE_SHIFT;
unsigned long line = paddr & ~(L1_CACHE_BYTES - 1); unsigned long line = paddr & ~(L1_CACHE_BYTES - 1);

View File

@ -270,9 +270,8 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_asyncpf_interrupt)
{ {
struct pt_regs *old_regs = set_irq_regs(regs); struct pt_regs *old_regs = set_irq_regs(regs);
u32 token; u32 token;
irqentry_state_t state;
state = irqentry_enter(regs); ack_APIC_irq();
inc_irq_stat(irq_hv_callback_count); inc_irq_stat(irq_hv_callback_count);
@ -283,7 +282,6 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_asyncpf_interrupt)
wrmsrl(MSR_KVM_ASYNC_PF_ACK, 1); wrmsrl(MSR_KVM_ASYNC_PF_ACK, 1);
} }
irqentry_exit(regs, state);
set_irq_regs(old_regs); set_irq_regs(old_regs);
} }
@ -654,7 +652,6 @@ static void __init kvm_guest_init(void)
} }
if (pv_tlb_flush_supported()) { if (pv_tlb_flush_supported()) {
pv_ops.mmu.flush_tlb_others = kvm_flush_tlb_others;
pv_ops.mmu.tlb_remove_table = tlb_remove_table; pv_ops.mmu.tlb_remove_table = tlb_remove_table;
pr_info("KVM setup pv remote TLB flush\n"); pr_info("KVM setup pv remote TLB flush\n");
} }
@ -767,6 +764,14 @@ static __init int activate_jump_labels(void)
} }
arch_initcall(activate_jump_labels); arch_initcall(activate_jump_labels);
static void kvm_free_pv_cpu_mask(void)
{
unsigned int cpu;
for_each_possible_cpu(cpu)
free_cpumask_var(per_cpu(__pv_cpu_mask, cpu));
}
static __init int kvm_alloc_cpumask(void) static __init int kvm_alloc_cpumask(void)
{ {
int cpu; int cpu;
@ -785,11 +790,20 @@ static __init int kvm_alloc_cpumask(void)
if (alloc) if (alloc)
for_each_possible_cpu(cpu) { for_each_possible_cpu(cpu) {
zalloc_cpumask_var_node(per_cpu_ptr(&__pv_cpu_mask, cpu), if (!zalloc_cpumask_var_node(
GFP_KERNEL, cpu_to_node(cpu)); per_cpu_ptr(&__pv_cpu_mask, cpu),
GFP_KERNEL, cpu_to_node(cpu))) {
goto zalloc_cpumask_fail;
}
} }
apic->send_IPI_mask_allbutself = kvm_send_ipi_mask_allbutself;
pv_ops.mmu.flush_tlb_others = kvm_flush_tlb_others;
return 0; return 0;
zalloc_cpumask_fail:
kvm_free_pv_cpu_mask();
return -ENOMEM;
} }
arch_initcall(kvm_alloc_cpumask); arch_initcall(kvm_alloc_cpumask);

View File

@ -2505,9 +2505,14 @@ static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
*reg_write(ctxt, i) = GET_SMSTATE(u32, smstate, 0x7fd0 + i * 4); *reg_write(ctxt, i) = GET_SMSTATE(u32, smstate, 0x7fd0 + i * 4);
val = GET_SMSTATE(u32, smstate, 0x7fcc); val = GET_SMSTATE(u32, smstate, 0x7fcc);
ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1);
if (ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1))
return X86EMUL_UNHANDLEABLE;
val = GET_SMSTATE(u32, smstate, 0x7fc8); val = GET_SMSTATE(u32, smstate, 0x7fc8);
ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1);
if (ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1))
return X86EMUL_UNHANDLEABLE;
selector = GET_SMSTATE(u32, smstate, 0x7fc4); selector = GET_SMSTATE(u32, smstate, 0x7fc4);
set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f64)); set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f64));
@ -2560,16 +2565,23 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED; ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED;
val = GET_SMSTATE(u32, smstate, 0x7f68); val = GET_SMSTATE(u32, smstate, 0x7f68);
ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1);
if (ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1))
return X86EMUL_UNHANDLEABLE;
val = GET_SMSTATE(u32, smstate, 0x7f60); val = GET_SMSTATE(u32, smstate, 0x7f60);
ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1);
if (ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1))
return X86EMUL_UNHANDLEABLE;
cr0 = GET_SMSTATE(u64, smstate, 0x7f58); cr0 = GET_SMSTATE(u64, smstate, 0x7f58);
cr3 = GET_SMSTATE(u64, smstate, 0x7f50); cr3 = GET_SMSTATE(u64, smstate, 0x7f50);
cr4 = GET_SMSTATE(u64, smstate, 0x7f48); cr4 = GET_SMSTATE(u64, smstate, 0x7f48);
ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smstate, 0x7f00)); ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smstate, 0x7f00));
val = GET_SMSTATE(u64, smstate, 0x7ed0); val = GET_SMSTATE(u64, smstate, 0x7ed0);
ctxt->ops->set_msr(ctxt, MSR_EFER, val & ~EFER_LMA);
if (ctxt->ops->set_msr(ctxt, MSR_EFER, val & ~EFER_LMA))
return X86EMUL_UNHANDLEABLE;
selector = GET_SMSTATE(u32, smstate, 0x7e90); selector = GET_SMSTATE(u32, smstate, 0x7e90);
rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e92) << 8); rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7e92) << 8);

View File

@ -2469,7 +2469,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
} }
if (sp->unsync_children) if (sp->unsync_children)
kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
__clear_sp_write_flooding_count(sp); __clear_sp_write_flooding_count(sp);

View File

@ -586,7 +586,6 @@ int nested_svm_vmexit(struct vcpu_svm *svm)
svm->vcpu.arch.mp_state = KVM_MP_STATE_RUNNABLE; svm->vcpu.arch.mp_state = KVM_MP_STATE_RUNNABLE;
/* Give the current vmcb to the guest */ /* Give the current vmcb to the guest */
svm_set_gif(svm, false);
nested_vmcb->save.es = vmcb->save.es; nested_vmcb->save.es = vmcb->save.es;
nested_vmcb->save.cs = vmcb->save.cs; nested_vmcb->save.cs = vmcb->save.cs;
@ -632,6 +631,9 @@ int nested_svm_vmexit(struct vcpu_svm *svm)
/* Restore the original control entries */ /* Restore the original control entries */
copy_vmcb_control_area(&vmcb->control, &hsave->control); copy_vmcb_control_area(&vmcb->control, &hsave->control);
/* On vmexit the GIF is set to false */
svm_set_gif(svm, false);
svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset = svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset =
svm->vcpu.arch.l1_tsc_offset; svm->vcpu.arch.l1_tsc_offset;
@ -1132,6 +1134,9 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu,
load_nested_vmcb_control(svm, &ctl); load_nested_vmcb_control(svm, &ctl);
nested_prepare_vmcb_control(svm); nested_prepare_vmcb_control(svm);
if (!nested_svm_vmrun_msrpm(svm))
return -EINVAL;
out_set_gif: out_set_gif:
svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET)); svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
return 0; return 0;

View File

@ -1106,6 +1106,7 @@ void sev_vm_destroy(struct kvm *kvm)
list_for_each_safe(pos, q, head) { list_for_each_safe(pos, q, head) {
__unregister_enc_region_locked(kvm, __unregister_enc_region_locked(kvm,
list_entry(pos, struct enc_region, list)); list_entry(pos, struct enc_region, list));
cond_resched();
} }
} }

View File

@ -2938,8 +2938,6 @@ static int handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)
if (npt_enabled) if (npt_enabled)
vcpu->arch.cr3 = svm->vmcb->save.cr3; vcpu->arch.cr3 = svm->vmcb->save.cr3;
svm_complete_interrupts(svm);
if (is_guest_mode(vcpu)) { if (is_guest_mode(vcpu)) {
int vmexit; int vmexit;
@ -3504,7 +3502,6 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)
stgi(); stgi();
/* Any pending NMI will happen here */ /* Any pending NMI will happen here */
exit_fastpath = svm_exit_handlers_fastpath(vcpu);
if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI)) if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI))
kvm_after_interrupt(&svm->vcpu); kvm_after_interrupt(&svm->vcpu);
@ -3518,6 +3515,7 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)
} }
svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING; svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
vmcb_mark_all_clean(svm->vmcb);
/* if exit due to PF check for async PF */ /* if exit due to PF check for async PF */
if (svm->vmcb->control.exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR) if (svm->vmcb->control.exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR)
@ -3537,7 +3535,8 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)
SVM_EXIT_EXCP_BASE + MC_VECTOR)) SVM_EXIT_EXCP_BASE + MC_VECTOR))
svm_handle_mce(svm); svm_handle_mce(svm);
vmcb_mark_all_clean(svm->vmcb); svm_complete_interrupts(svm);
exit_fastpath = svm_exit_handlers_fastpath(vcpu);
return exit_fastpath; return exit_fastpath;
} }
@ -3900,21 +3899,28 @@ static int svm_pre_enter_smm(struct kvm_vcpu *vcpu, char *smstate)
static int svm_pre_leave_smm(struct kvm_vcpu *vcpu, const char *smstate) static int svm_pre_leave_smm(struct kvm_vcpu *vcpu, const char *smstate)
{ {
struct vcpu_svm *svm = to_svm(vcpu); struct vcpu_svm *svm = to_svm(vcpu);
struct vmcb *nested_vmcb;
struct kvm_host_map map; struct kvm_host_map map;
u64 guest;
u64 vmcb;
int ret = 0; int ret = 0;
guest = GET_SMSTATE(u64, smstate, 0x7ed8); if (guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
vmcb = GET_SMSTATE(u64, smstate, 0x7ee0); u64 saved_efer = GET_SMSTATE(u64, smstate, 0x7ed0);
u64 guest = GET_SMSTATE(u64, smstate, 0x7ed8);
u64 vmcb = GET_SMSTATE(u64, smstate, 0x7ee0);
if (guest) { if (guest) {
if (kvm_vcpu_map(&svm->vcpu, gpa_to_gfn(vmcb), &map) == -EINVAL) if (!guest_cpuid_has(vcpu, X86_FEATURE_SVM))
return 1; return 1;
nested_vmcb = map.hva;
ret = enter_svm_guest_mode(svm, vmcb, nested_vmcb); if (!(saved_efer & EFER_SVME))
kvm_vcpu_unmap(&svm->vcpu, &map, true); return 1;
if (kvm_vcpu_map(&svm->vcpu,
gpa_to_gfn(vmcb), &map) == -EINVAL)
return 1;
ret = enter_svm_guest_mode(svm, vmcb, map.hva);
kvm_vcpu_unmap(&svm->vcpu, &map, true);
}
} }
return ret; return ret;

View File

@ -4404,6 +4404,14 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu)) if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
kvm_vcpu_flush_tlb_current(vcpu); kvm_vcpu_flush_tlb_current(vcpu);
/*
* VCPU_EXREG_PDPTR will be clobbered in arch/x86/kvm/vmx/vmx.h between
* now and the new vmentry. Ensure that the VMCS02 PDPTR fields are
* up-to-date before switching to L1.
*/
if (enable_ept && is_pae_paging(vcpu))
vmx_ept_load_pdptrs(vcpu);
leave_guest_mode(vcpu); leave_guest_mode(vcpu);
if (nested_cpu_has_preemption_timer(vmcs12)) if (nested_cpu_has_preemption_timer(vmcs12))
@ -4668,7 +4676,7 @@ void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu)
vmx->nested.msrs.entry_ctls_high &= vmx->nested.msrs.entry_ctls_high &=
~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
vmx->nested.msrs.exit_ctls_high &= vmx->nested.msrs.exit_ctls_high &=
~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
} }
} }

View File

@ -2971,7 +2971,7 @@ static void vmx_flush_tlb_guest(struct kvm_vcpu *vcpu)
vpid_sync_context(to_vmx(vcpu)->vpid); vpid_sync_context(to_vmx(vcpu)->vpid);
} }
static void ept_load_pdptrs(struct kvm_vcpu *vcpu) void vmx_ept_load_pdptrs(struct kvm_vcpu *vcpu)
{ {
struct kvm_mmu *mmu = vcpu->arch.walk_mmu; struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
@ -3114,7 +3114,7 @@ static void vmx_load_mmu_pgd(struct kvm_vcpu *vcpu, unsigned long pgd,
guest_cr3 = vcpu->arch.cr3; guest_cr3 = vcpu->arch.cr3;
else /* vmcs01.GUEST_CR3 is already up-to-date. */ else /* vmcs01.GUEST_CR3 is already up-to-date. */
update_guest_cr3 = false; update_guest_cr3 = false;
ept_load_pdptrs(vcpu); vmx_ept_load_pdptrs(vcpu);
} else { } else {
guest_cr3 = pgd; guest_cr3 = pgd;
} }
@ -6054,6 +6054,7 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)
(exit_reason != EXIT_REASON_EXCEPTION_NMI && (exit_reason != EXIT_REASON_EXCEPTION_NMI &&
exit_reason != EXIT_REASON_EPT_VIOLATION && exit_reason != EXIT_REASON_EPT_VIOLATION &&
exit_reason != EXIT_REASON_PML_FULL && exit_reason != EXIT_REASON_PML_FULL &&
exit_reason != EXIT_REASON_APIC_ACCESS &&
exit_reason != EXIT_REASON_TASK_SWITCH)) { exit_reason != EXIT_REASON_TASK_SWITCH)) {
vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV; vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV;

View File

@ -356,6 +356,7 @@ void vmx_update_host_rsp(struct vcpu_vmx *vmx, unsigned long host_rsp);
int vmx_find_msr_index(struct vmx_msrs *m, u32 msr); int vmx_find_msr_index(struct vmx_msrs *m, u32 msr);
int vmx_handle_memory_failure(struct kvm_vcpu *vcpu, int r, int vmx_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
struct x86_exception *e); struct x86_exception *e);
void vmx_ept_load_pdptrs(struct kvm_vcpu *vcpu);
#define POSTED_INTR_ON 0 #define POSTED_INTR_ON 0
#define POSTED_INTR_SN 1 #define POSTED_INTR_SN 1

View File

@ -2731,7 +2731,7 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
return 1; return 1;
if (!lapic_in_kernel(vcpu)) if (!lapic_in_kernel(vcpu))
return 1; return data ? 1 : 0;
vcpu->arch.apf.msr_en_val = data; vcpu->arch.apf.msr_en_val = data;
@ -3578,6 +3578,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
case KVM_CAP_SMALLER_MAXPHYADDR: case KVM_CAP_SMALLER_MAXPHYADDR:
r = (int) allow_smaller_maxphyaddr; r = (int) allow_smaller_maxphyaddr;
break; break;
case KVM_CAP_STEAL_TIME:
r = sched_info_on();
break;
default: default:
break; break;
} }

View File

@ -5895,18 +5895,6 @@ static void bfq_finish_requeue_request(struct request *rq)
struct bfq_queue *bfqq = RQ_BFQQ(rq); struct bfq_queue *bfqq = RQ_BFQQ(rq);
struct bfq_data *bfqd; struct bfq_data *bfqd;
/*
* Requeue and finish hooks are invoked in blk-mq without
* checking whether the involved request is actually still
* referenced in the scheduler. To handle this fact, the
* following two checks make this function exit in case of
* spurious invocations, for which there is nothing to do.
*
* First, check whether rq has nothing to do with an elevator.
*/
if (unlikely(!(rq->rq_flags & RQF_ELVPRIV)))
return;
/* /*
* rq either is not associated with any icq, or is an already * rq either is not associated with any icq, or is an already
* requeued request that has not (yet) been re-inserted into * requeued request that has not (yet) been re-inserted into

View File

@ -879,8 +879,10 @@ bool __bio_try_merge_page(struct bio *bio, struct page *page,
struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt - 1]; struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt - 1];
if (page_is_mergeable(bv, page, len, off, same_page)) { if (page_is_mergeable(bv, page, len, off, same_page)) {
if (bio->bi_iter.bi_size > UINT_MAX - len) if (bio->bi_iter.bi_size > UINT_MAX - len) {
*same_page = false;
return false; return false;
}
bv->bv_len += len; bv->bv_len += len;
bio->bi_iter.bi_size += len; bio->bi_iter.bi_size += len;
return true; return true;

View File

@ -66,7 +66,7 @@ static inline void blk_mq_sched_requeue_request(struct request *rq)
struct request_queue *q = rq->q; struct request_queue *q = rq->q;
struct elevator_queue *e = q->elevator; struct elevator_queue *e = q->elevator;
if (e && e->type->ops.requeue_request) if ((rq->rq_flags & RQF_ELVPRIV) && e && e->type->ops.requeue_request)
e->type->ops.requeue_request(rq); e->type->ops.requeue_request(rq);
} }

View File

@ -537,7 +537,7 @@ int bdev_del_partition(struct block_device *bdev, int partno)
bdevp = bdget_disk(bdev->bd_disk, partno); bdevp = bdget_disk(bdev->bd_disk, partno);
if (!bdevp) if (!bdevp)
return -ENOMEM; return -ENXIO;
mutex_lock(&bdevp->bd_mutex); mutex_lock(&bdevp->bd_mutex);
mutex_lock_nested(&bdev->bd_mutex, 1); mutex_lock_nested(&bdev->bd_mutex, 1);

View File

@ -807,9 +807,7 @@ static void device_link_put_kref(struct device_link *link)
void device_link_del(struct device_link *link) void device_link_del(struct device_link *link)
{ {
device_links_write_lock(); device_links_write_lock();
device_pm_lock();
device_link_put_kref(link); device_link_put_kref(link);
device_pm_unlock();
device_links_write_unlock(); device_links_write_unlock();
} }
EXPORT_SYMBOL_GPL(device_link_del); EXPORT_SYMBOL_GPL(device_link_del);
@ -830,7 +828,6 @@ void device_link_remove(void *consumer, struct device *supplier)
return; return;
device_links_write_lock(); device_links_write_lock();
device_pm_lock();
list_for_each_entry(link, &supplier->links.consumers, s_node) { list_for_each_entry(link, &supplier->links.consumers, s_node) {
if (link->consumer == consumer) { if (link->consumer == consumer) {
@ -839,7 +836,6 @@ void device_link_remove(void *consumer, struct device *supplier)
} }
} }
device_pm_unlock();
device_links_write_unlock(); device_links_write_unlock();
} }
EXPORT_SYMBOL_GPL(device_link_remove); EXPORT_SYMBOL_GPL(device_link_remove);
@ -4237,10 +4233,10 @@ int dev_err_probe(const struct device *dev, int err, const char *fmt, ...)
vaf.va = &args; vaf.va = &args;
if (err != -EPROBE_DEFER) { if (err != -EPROBE_DEFER) {
dev_err(dev, "error %d: %pV", err, &vaf); dev_err(dev, "error %pe: %pV", ERR_PTR(err), &vaf);
} else { } else {
device_set_deferred_probe_reason(dev, &vaf); device_set_deferred_probe_reason(dev, &vaf);
dev_dbg(dev, "error %d: %pV", err, &vaf); dev_dbg(dev, "error %pe: %pV", ERR_PTR(err), &vaf);
} }
va_end(args); va_end(args);

View File

@ -142,10 +142,12 @@ int assign_fw(struct firmware *fw, struct device *device, u32 opt_flags);
void fw_free_paged_buf(struct fw_priv *fw_priv); void fw_free_paged_buf(struct fw_priv *fw_priv);
int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed); int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed);
int fw_map_paged_buf(struct fw_priv *fw_priv); int fw_map_paged_buf(struct fw_priv *fw_priv);
bool fw_is_paged_buf(struct fw_priv *fw_priv);
#else #else
static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {} static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {}
static inline int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; } static inline int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; }
static inline int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; } static inline int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; }
static inline bool fw_is_paged_buf(struct fw_priv *fw_priv) { return false; }
#endif #endif
#endif /* __FIRMWARE_LOADER_H */ #endif /* __FIRMWARE_LOADER_H */

View File

@ -252,9 +252,11 @@ static void __free_fw_priv(struct kref *ref)
list_del(&fw_priv->list); list_del(&fw_priv->list);
spin_unlock(&fwc->lock); spin_unlock(&fwc->lock);
fw_free_paged_buf(fw_priv); /* free leftover pages */ if (fw_is_paged_buf(fw_priv))
if (!fw_priv->allocated_size) fw_free_paged_buf(fw_priv);
else if (!fw_priv->allocated_size)
vfree(fw_priv->data); vfree(fw_priv->data);
kfree_const(fw_priv->fw_name); kfree_const(fw_priv->fw_name);
kfree(fw_priv); kfree(fw_priv);
} }
@ -268,6 +270,11 @@ static void free_fw_priv(struct fw_priv *fw_priv)
} }
#ifdef CONFIG_FW_LOADER_PAGED_BUF #ifdef CONFIG_FW_LOADER_PAGED_BUF
bool fw_is_paged_buf(struct fw_priv *fw_priv)
{
return fw_priv->is_paged_buf;
}
void fw_free_paged_buf(struct fw_priv *fw_priv) void fw_free_paged_buf(struct fw_priv *fw_priv)
{ {
int i; int i;
@ -275,6 +282,8 @@ void fw_free_paged_buf(struct fw_priv *fw_priv)
if (!fw_priv->pages) if (!fw_priv->pages)
return; return;
vunmap(fw_priv->data);
for (i = 0; i < fw_priv->nr_pages; i++) for (i = 0; i < fw_priv->nr_pages; i++)
__free_page(fw_priv->pages[i]); __free_page(fw_priv->pages[i]);
kvfree(fw_priv->pages); kvfree(fw_priv->pages);
@ -328,10 +337,6 @@ int fw_map_paged_buf(struct fw_priv *fw_priv)
if (!fw_priv->data) if (!fw_priv->data)
return -ENOMEM; return -ENOMEM;
/* page table is no longer needed after mapping, let's free */
kvfree(fw_priv->pages);
fw_priv->pages = NULL;
return 0; return 0;
} }
#endif #endif

View File

@ -5120,6 +5120,9 @@ static ssize_t rbd_config_info_show(struct device *dev,
{ {
struct rbd_device *rbd_dev = dev_to_rbd_dev(dev); struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
return sprintf(buf, "%s\n", rbd_dev->config_info); return sprintf(buf, "%s\n", rbd_dev->config_info);
} }
@ -5231,6 +5234,9 @@ static ssize_t rbd_image_refresh(struct device *dev,
struct rbd_device *rbd_dev = dev_to_rbd_dev(dev); struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
int ret; int ret;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
ret = rbd_dev_refresh(rbd_dev); ret = rbd_dev_refresh(rbd_dev);
if (ret) if (ret)
return ret; return ret;
@ -7059,6 +7065,9 @@ static ssize_t do_rbd_add(struct bus_type *bus,
struct rbd_client *rbdc; struct rbd_client *rbdc;
int rc; int rc;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
if (!try_module_get(THIS_MODULE)) if (!try_module_get(THIS_MODULE))
return -ENODEV; return -ENODEV;
@ -7209,6 +7218,9 @@ static ssize_t do_rbd_remove(struct bus_type *bus,
bool force = false; bool force = false;
int ret; int ret;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
dev_id = -1; dev_id = -1;
opt_buf[0] = '\0'; opt_buf[0] = '\0';
sscanf(buf, "%d %5s", &dev_id, opt_buf); sscanf(buf, "%d %5s", &dev_id, opt_buf);

View File

@ -320,8 +320,8 @@ static int mchp_tc_probe(struct platform_device *pdev)
} }
regmap = syscon_node_to_regmap(np->parent); regmap = syscon_node_to_regmap(np->parent);
if (IS_ERR(priv->regmap)) if (IS_ERR(regmap))
return PTR_ERR(priv->regmap); return PTR_ERR(regmap);
/* max. channels number is 2 when in QDEC mode */ /* max. channels number is 2 when in QDEC mode */
priv->num_channels = of_property_count_u32_elems(np, "reg"); priv->num_channels = of_property_count_u32_elems(np, "reg");

View File

@ -100,7 +100,7 @@ bool __generic_fsdax_supported(struct dax_device *dax_dev,
return false; return false;
} }
if (!dax_dev && !bdev_dax_supported(bdev, blocksize)) { if (!dax_dev || !bdev_dax_supported(bdev, blocksize)) {
pr_debug("%s: error: dax unsupported by block device\n", pr_debug("%s: error: dax unsupported by block device\n",
bdevname(bdev, buf)); bdevname(bdev, buf));
return false; return false;

View File

@ -316,9 +316,9 @@ out:
* name of the dma-buf if the same piece of memory is used for multiple * name of the dma-buf if the same piece of memory is used for multiple
* purpose between different devices. * purpose between different devices.
* *
* @dmabuf [in] dmabuf buffer that will be renamed. * @dmabuf: [in] dmabuf buffer that will be renamed.
* @buf: [in] A piece of userspace memory that contains the name of * @buf: [in] A piece of userspace memory that contains the name of
* the dma-buf. * the dma-buf.
* *
* Returns 0 on success. If the dma-buf buffer is already attached to * Returns 0 on success. If the dma-buf buffer is already attached to
* devices, return -EBUSY. * devices, return -EBUSY.

View File

@ -222,6 +222,7 @@ EXPORT_SYMBOL(dma_fence_chain_ops);
* @chain: the chain node to initialize * @chain: the chain node to initialize
* @prev: the previous fence * @prev: the previous fence
* @fence: the current fence * @fence: the current fence
* @seqno: the sequence number to use for the fence chain
* *
* Initialize a new chain node and either start a new chain or add the node to * Initialize a new chain node and either start a new chain or add the node to
* the existing chain of the previous fence. * the existing chain of the previous fence.

View File

@ -16,9 +16,9 @@
/* Exported for use by lib/test_firmware.c only */ /* Exported for use by lib/test_firmware.c only */
LIST_HEAD(efi_embedded_fw_list); LIST_HEAD(efi_embedded_fw_list);
EXPORT_SYMBOL_GPL(efi_embedded_fw_list); EXPORT_SYMBOL_NS_GPL(efi_embedded_fw_list, TEST_FIRMWARE);
bool efi_embedded_fw_checked;
static bool checked_for_fw; EXPORT_SYMBOL_NS_GPL(efi_embedded_fw_checked, TEST_FIRMWARE);
static const struct dmi_system_id * const embedded_fw_table[] = { static const struct dmi_system_id * const embedded_fw_table[] = {
#ifdef CONFIG_TOUCHSCREEN_DMI #ifdef CONFIG_TOUCHSCREEN_DMI
@ -116,14 +116,14 @@ void __init efi_check_for_embedded_firmwares(void)
} }
} }
checked_for_fw = true; efi_embedded_fw_checked = true;
} }
int efi_get_embedded_fw(const char *name, const u8 **data, size_t *size) int efi_get_embedded_fw(const char *name, const u8 **data, size_t *size)
{ {
struct efi_embedded_fw *iter, *fw = NULL; struct efi_embedded_fw *iter, *fw = NULL;
if (!checked_for_fw) { if (!efi_embedded_fw_checked) {
pr_warn("Warning %s called while we did not check for embedded fw\n", pr_warn("Warning %s called while we did not check for embedded fw\n",
__func__); __func__);
return -ENOENT; return -ENOENT;

View File

@ -15009,12 +15009,6 @@ static int intel_atomic_check(struct drm_device *dev,
if (dev_priv->wm.distrust_bios_wm) if (dev_priv->wm.distrust_bios_wm)
any_ms = true; any_ms = true;
if (any_ms) {
ret = intel_modeset_checks(state);
if (ret)
goto fail;
}
intel_fbc_choose_crtc(dev_priv, state); intel_fbc_choose_crtc(dev_priv, state);
ret = calc_watermark_data(state); ret = calc_watermark_data(state);
if (ret) if (ret)
@ -15029,6 +15023,10 @@ static int intel_atomic_check(struct drm_device *dev,
goto fail; goto fail;
if (any_ms) { if (any_ms) {
ret = intel_modeset_checks(state);
if (ret)
goto fail;
ret = intel_modeset_calc_cdclk(state); ret = intel_modeset_calc_cdclk(state);
if (ret) if (ret)
return ret; return ret;

View File

@ -686,7 +686,7 @@ static void ingenic_drm_unbind_all(void *d)
component_unbind_all(priv->dev, &priv->drm); component_unbind_all(priv->dev, &priv->drm);
} }
static int ingenic_drm_bind(struct device *dev) static int ingenic_drm_bind(struct device *dev, bool has_components)
{ {
struct platform_device *pdev = to_platform_device(dev); struct platform_device *pdev = to_platform_device(dev);
const struct jz_soc_info *soc_info; const struct jz_soc_info *soc_info;
@ -821,7 +821,7 @@ static int ingenic_drm_bind(struct device *dev)
return ret; return ret;
} }
if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU)) { if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU) && has_components) {
ret = component_bind_all(dev, drm); ret = component_bind_all(dev, drm);
if (ret) { if (ret) {
if (ret != -EPROBE_DEFER) if (ret != -EPROBE_DEFER)
@ -952,6 +952,11 @@ err_pixclk_disable:
return ret; return ret;
} }
static int ingenic_drm_bind_with_components(struct device *dev)
{
return ingenic_drm_bind(dev, true);
}
static int compare_of(struct device *dev, void *data) static int compare_of(struct device *dev, void *data)
{ {
return dev->of_node == data; return dev->of_node == data;
@ -970,7 +975,7 @@ static void ingenic_drm_unbind(struct device *dev)
} }
static const struct component_master_ops ingenic_master_ops = { static const struct component_master_ops ingenic_master_ops = {
.bind = ingenic_drm_bind, .bind = ingenic_drm_bind_with_components,
.unbind = ingenic_drm_unbind, .unbind = ingenic_drm_unbind,
}; };
@ -981,16 +986,15 @@ static int ingenic_drm_probe(struct platform_device *pdev)
struct device_node *np; struct device_node *np;
if (!IS_ENABLED(CONFIG_DRM_INGENIC_IPU)) if (!IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
return ingenic_drm_bind(dev); return ingenic_drm_bind(dev, false);
/* IPU is at port address 8 */ /* IPU is at port address 8 */
np = of_graph_get_remote_node(dev->of_node, 8, 0); np = of_graph_get_remote_node(dev->of_node, 8, 0);
if (!np) { if (!np)
dev_err(dev, "Unable to get IPU node\n"); return ingenic_drm_bind(dev, false);
return -EINVAL;
}
drm_of_component_match_add(dev, &match, compare_of, np); drm_of_component_match_add(dev, &match, compare_of, np);
of_node_put(np);
return component_master_add_with_match(dev, &ingenic_master_ops, match); return component_master_add_with_match(dev, &ingenic_master_ops, match);
} }

View File

@ -589,8 +589,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine *engine,
/* We can't have an alpha plane at the lowest position */ /* We can't have an alpha plane at the lowest position */
if (!backend->quirks->supports_lowest_plane_alpha && if (!backend->quirks->supports_lowest_plane_alpha &&
(plane_states[0]->fb->format->has_alpha || (plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE))
(plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE)))
return -EINVAL; return -EINVAL;
for (i = 1; i < num_planes; i++) { for (i = 1; i < num_planes; i++) {
@ -995,7 +994,6 @@ static const struct sun4i_backend_quirks sun6i_backend_quirks = {
static const struct sun4i_backend_quirks sun7i_backend_quirks = { static const struct sun4i_backend_quirks sun7i_backend_quirks = {
.needs_output_muxing = true, .needs_output_muxing = true,
.supports_lowest_plane_alpha = true,
}; };
static const struct sun4i_backend_quirks sun8i_a33_backend_quirks = { static const struct sun4i_backend_quirks sun8i_a33_backend_quirks = {

View File

@ -1431,14 +1431,18 @@ static int sun8i_r40_tcon_tv_set_mux(struct sun4i_tcon *tcon,
if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) && if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
encoder->encoder_type == DRM_MODE_ENCODER_TMDS) { encoder->encoder_type == DRM_MODE_ENCODER_TMDS) {
ret = sun8i_tcon_top_set_hdmi_src(&pdev->dev, id); ret = sun8i_tcon_top_set_hdmi_src(&pdev->dev, id);
if (ret) if (ret) {
put_device(&pdev->dev);
return ret; return ret;
}
} }
if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP)) { if (IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP)) {
ret = sun8i_tcon_top_de_config(&pdev->dev, tcon->id, id); ret = sun8i_tcon_top_de_config(&pdev->dev, tcon->id, id);
if (ret) if (ret) {
put_device(&pdev->dev);
return ret; return ret;
}
} }
return 0; return 0;

View File

@ -889,7 +889,7 @@ static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi,
regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0), regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0),
sun6i_dsi_dcs_build_pkt_hdr(dsi, msg)); sun6i_dsi_dcs_build_pkt_hdr(dsi, msg));
bounce = kzalloc(msg->tx_len + sizeof(crc), GFP_KERNEL); bounce = kzalloc(ALIGN(msg->tx_len + sizeof(crc), 4), GFP_KERNEL);
if (!bounce) if (!bounce)
return -ENOMEM; return -ENOMEM;
@ -900,7 +900,7 @@ static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi,
memcpy((u8 *)bounce + msg->tx_len, &crc, sizeof(crc)); memcpy((u8 *)bounce + msg->tx_len, &crc, sizeof(crc));
len += sizeof(crc); len += sizeof(crc);
regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, len); regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, DIV_ROUND_UP(len, 4));
regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, len + 4 - 1); regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, len + 4 - 1);
kfree(bounce); kfree(bounce);

View File

@ -211,7 +211,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
return 0; return 0;
} }
static bool sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format) static u32 sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format)
{ {
if (!format->is_yuv) if (!format->is_yuv)
return SUN8I_CSC_MODE_OFF; return SUN8I_CSC_MODE_OFF;

View File

@ -14,6 +14,7 @@
#include <linux/version.h> #include <linux/version.h>
#include <linux/dma-buf.h> #include <linux/dma-buf.h>
#include <linux/of_graph.h> #include <linux/of_graph.h>
#include <linux/delay.h>
#include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_cma_helper.h>
#include <drm/drm_fourcc.h> #include <drm/drm_fourcc.h>
@ -130,9 +131,25 @@ static void tve200_display_enable(struct drm_simple_display_pipe *pipe,
struct drm_connector *connector = priv->connector; struct drm_connector *connector = priv->connector;
u32 format = fb->format->format; u32 format = fb->format->format;
u32 ctrl1 = 0; u32 ctrl1 = 0;
int retries;
clk_prepare_enable(priv->clk); clk_prepare_enable(priv->clk);
/* Reset the TVE200 and wait for it to come back online */
writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4);
for (retries = 0; retries < 5; retries++) {
usleep_range(30000, 50000);
if (readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET)
continue;
else
break;
}
if (retries == 5 &&
readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET) {
dev_err(drm->dev, "can't get hardware out of reset\n");
return;
}
/* Function 1 */ /* Function 1 */
ctrl1 |= TVE200_CTRL_CSMODE; ctrl1 |= TVE200_CTRL_CSMODE;
/* Interlace mode for CCIR656: parameterize? */ /* Interlace mode for CCIR656: parameterize? */
@ -230,8 +247,9 @@ static void tve200_display_disable(struct drm_simple_display_pipe *pipe)
drm_crtc_vblank_off(crtc); drm_crtc_vblank_off(crtc);
/* Disable and Power Down */ /* Disable put into reset and Power Down */
writel(0, priv->regs + TVE200_CTRL); writel(0, priv->regs + TVE200_CTRL);
writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4);
clk_disable_unprepare(priv->clk); clk_disable_unprepare(priv->clk);
} }
@ -279,6 +297,8 @@ static int tve200_display_enable_vblank(struct drm_simple_display_pipe *pipe)
struct drm_device *drm = crtc->dev; struct drm_device *drm = crtc->dev;
struct tve200_drm_dev_private *priv = drm->dev_private; struct tve200_drm_dev_private *priv = drm->dev_private;
/* Clear any IRQs and enable */
writel(0xFF, priv->regs + TVE200_INT_CLR);
writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN); writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN);
return 0; return 0;
} }

View File

@ -97,9 +97,6 @@ static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc, static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state) struct drm_crtc_state *old_state)
{ {
struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
output->enabled = true;
} }
static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc, static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,
@ -111,7 +108,6 @@ static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc,
virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0); virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
virtio_gpu_notify(vgdev); virtio_gpu_notify(vgdev);
output->enabled = false;
} }
static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
@ -123,6 +119,17 @@ static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc, static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_state) struct drm_crtc_state *old_state)
{ {
struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
/*
* virtio-gpu can't do modeset and plane update operations
* independent from each other. So the actual modeset happens
* in the plane update callback, and here we just check
* whenever we must force the modeset.
*/
if (drm_atomic_crtc_needs_modeset(crtc->state)) {
output->needs_modeset = true;
}
} }
static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = { static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {

View File

@ -144,7 +144,7 @@ struct virtio_gpu_output {
struct edid *edid; struct edid *edid;
int cur_x; int cur_x;
int cur_y; int cur_y;
bool enabled; bool needs_modeset;
}; };
#define drm_crtc_to_virtio_gpu_output(x) \ #define drm_crtc_to_virtio_gpu_output(x) \
container_of(x, struct virtio_gpu_output, crtc) container_of(x, struct virtio_gpu_output, crtc)

View File

@ -142,7 +142,7 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
if (WARN_ON(!output)) if (WARN_ON(!output))
return; return;
if (!plane->state->fb || !output->enabled) { if (!plane->state->fb || !output->crtc.state->active) {
DRM_DEBUG("nofb\n"); DRM_DEBUG("nofb\n");
virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
plane->state->src_w >> 16, plane->state->src_w >> 16,
@ -163,7 +163,9 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
plane->state->src_w != old_state->src_w || plane->state->src_w != old_state->src_w ||
plane->state->src_h != old_state->src_h || plane->state->src_h != old_state->src_h ||
plane->state->src_x != old_state->src_x || plane->state->src_x != old_state->src_x ||
plane->state->src_y != old_state->src_y) { plane->state->src_y != old_state->src_y ||
output->needs_modeset) {
output->needs_modeset = false;
DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n",
bo->hw_res_handle, bo->hw_res_handle,
plane->state->crtc_w, plane->state->crtc_h, plane->state->crtc_w, plane->state->crtc_h,

View File

@ -2,6 +2,7 @@ config DRM_ZYNQMP_DPSUB
tristate "ZynqMP DisplayPort Controller Driver" tristate "ZynqMP DisplayPort Controller Driver"
depends on ARCH_ZYNQMP || COMPILE_TEST depends on ARCH_ZYNQMP || COMPILE_TEST
depends on COMMON_CLK && DRM && OF depends on COMMON_CLK && DRM && OF
depends on DMADEVICES
select DMA_ENGINE select DMA_ENGINE
select DRM_GEM_CMA_HELPER select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER select DRM_KMS_CMA_HELPER

View File

@ -41,8 +41,22 @@ static void pca_reset(struct i2c_algo_pca_data *adap)
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
pca_outw(adap, I2C_PCA_IND, 0xA5); pca_outw(adap, I2C_PCA_IND, 0xA5);
pca_outw(adap, I2C_PCA_IND, 0x5A); pca_outw(adap, I2C_PCA_IND, 0x5A);
/*
* After a reset we need to re-apply any configuration
* (calculated in pca_init) to get the bus in a working state.
*/
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE);
pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode);
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow);
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi);
pca_set_con(adap, I2C_PCA_CON_ENSIO);
} else { } else {
adap->reset_chip(adap->data); adap->reset_chip(adap->data);
pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq);
} }
} }
@ -423,13 +437,14 @@ static int pca_init(struct i2c_adapter *adap)
" Use the nominal frequency.\n", adap->name); " Use the nominal frequency.\n", adap->name);
} }
pca_reset(pca_data);
clock = pca_clock(pca_data); clock = pca_clock(pca_data);
printk(KERN_INFO "%s: Clock frequency is %dkHz\n", printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
adap->name, freqs[clock]); adap->name, freqs[clock]);
pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); /* Store settings as these will be needed when the PCA chip is reset */
pca_data->bus_settings.clock_freq = clock;
pca_reset(pca_data);
} else { } else {
int clock; int clock;
int mode; int mode;
@ -496,19 +511,15 @@ static int pca_init(struct i2c_adapter *adap)
thi = tlow * min_thi / min_tlow; thi = tlow * min_thi / min_tlow;
} }
/* Store settings as these will be needed when the PCA chip is reset */
pca_data->bus_settings.mode = mode;
pca_data->bus_settings.tlow = tlow;
pca_data->bus_settings.thi = thi;
pca_reset(pca_data); pca_reset(pca_data);
printk(KERN_INFO printk(KERN_INFO
"%s: Clock frequency is %dHz\n", adap->name, clock * 100); "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
pca_outw(pca_data, I2C_PCA_IND, mode);
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
pca_outw(pca_data, I2C_PCA_IND, tlow);
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
pca_outw(pca_data, I2C_PCA_IND, thi);
pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
} }
udelay(500); /* 500 us for oscillator to stabilise */ udelay(500); /* 500 us for oscillator to stabilise */

View File

@ -2093,8 +2093,12 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
} }
} }
/* Adaptive TimeOut: astimated time in usec + 100% margin */ /*
timeout_usec = (2 * 10000 / bus->bus_freq) * (2 + nread + nwrite); * Adaptive TimeOut: estimated time in usec + 100% margin:
* 2: double the timeout for clock stretching case
* 9: bits per transaction (including the ack/nack)
*/
timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite);
timeout = max(msecs_to_jiffies(35), usecs_to_jiffies(timeout_usec)); timeout = max(msecs_to_jiffies(35), usecs_to_jiffies(timeout_usec));
if (nwrite >= 32 * 1024 || nread >= 32 * 1024) { if (nwrite >= 32 * 1024 || nread >= 32 * 1024) {
dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); dev_err(bus->dev, "i2c%d buffer too big\n", bus->num);

View File

@ -189,6 +189,14 @@ struct bmc150_accel_data {
struct mutex mutex; struct mutex mutex;
u8 fifo_mode, watermark; u8 fifo_mode, watermark;
s16 buffer[8]; s16 buffer[8];
/*
* Ensure there is sufficient space and correct alignment for
* the timestamp if enabled
*/
struct {
__le16 channels[3];
s64 ts __aligned(8);
} scan;
u8 bw_bits; u8 bw_bits;
u32 slope_dur; u32 slope_dur;
u32 slope_thres; u32 slope_thres;
@ -922,15 +930,16 @@ static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
* now. * now.
*/ */
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
u16 sample[8];
int j, bit; int j, bit;
j = 0; j = 0;
for_each_set_bit(bit, indio_dev->active_scan_mask, for_each_set_bit(bit, indio_dev->active_scan_mask,
indio_dev->masklength) indio_dev->masklength)
memcpy(&sample[j++], &buffer[i * 3 + bit], 2); memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
sizeof(data->scan.channels[0]));
iio_push_to_buffers_with_timestamp(indio_dev, sample, tstamp); iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
tstamp);
tstamp += sample_period; tstamp += sample_period;
} }

View File

@ -209,14 +209,20 @@ static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
const struct iio_poll_func *pf = p; const struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct kxsd9_state *st = iio_priv(indio_dev); struct kxsd9_state *st = iio_priv(indio_dev);
/*
* Ensure correct positioning and alignment of timestamp.
* No need to zero initialize as all elements written.
*/
struct {
__be16 chan[4];
s64 ts __aligned(8);
} hw_values;
int ret; int ret;
/* 4 * 16bit values AND timestamp */
__be16 hw_values[8];
ret = regmap_bulk_read(st->map, ret = regmap_bulk_read(st->map,
KXSD9_REG_X, KXSD9_REG_X,
&hw_values, hw_values.chan,
8); sizeof(hw_values.chan));
if (ret) { if (ret) {
dev_err(st->dev, dev_err(st->dev,
"error reading data\n"); "error reading data\n");
@ -224,7 +230,7 @@ static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
} }
iio_push_to_buffers_with_timestamp(indio_dev, iio_push_to_buffers_with_timestamp(indio_dev,
hw_values, &hw_values,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
iio_trigger_notify_done(indio_dev->trig); iio_trigger_notify_done(indio_dev->trig);

View File

@ -52,6 +52,14 @@
struct mma7455_data { struct mma7455_data {
struct regmap *regmap; struct regmap *regmap;
/*
* Used to reorganize data. Will ensure correct alignment of
* the timestamp if present
*/
struct {
__le16 channels[3];
s64 ts __aligned(8);
} scan;
}; };
static int mma7455_drdy(struct mma7455_data *mma7455) static int mma7455_drdy(struct mma7455_data *mma7455)
@ -82,19 +90,19 @@ static irqreturn_t mma7455_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct mma7455_data *mma7455 = iio_priv(indio_dev); struct mma7455_data *mma7455 = iio_priv(indio_dev);
u8 buf[16]; /* 3 x 16-bit channels + padding + ts */
int ret; int ret;
ret = mma7455_drdy(mma7455); ret = mma7455_drdy(mma7455);
if (ret) if (ret)
goto done; goto done;
ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL, buf, ret = regmap_bulk_read(mma7455->regmap, MMA7455_REG_XOUTL,
sizeof(__le16) * 3); mma7455->scan.channels,
sizeof(mma7455->scan.channels));
if (ret) if (ret)
goto done; goto done;
iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_push_to_buffers_with_timestamp(indio_dev, &mma7455->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
done: done:

View File

@ -110,6 +110,12 @@ struct mma8452_data {
int sleep_val; int sleep_val;
struct regulator *vdd_reg; struct regulator *vdd_reg;
struct regulator *vddio_reg; struct regulator *vddio_reg;
/* Ensure correct alignment of time stamp when present */
struct {
__be16 channels[3];
s64 ts __aligned(8);
} buffer;
}; };
/** /**
@ -1091,14 +1097,13 @@ static irqreturn_t mma8452_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct mma8452_data *data = iio_priv(indio_dev); struct mma8452_data *data = iio_priv(indio_dev);
u8 buffer[16]; /* 3 16-bit channels + padding + ts */
int ret; int ret;
ret = mma8452_read(data, (__be16 *)buffer); ret = mma8452_read(data, data->buffer.channels);
if (ret < 0) if (ret < 0)
goto done; goto done;
iio_push_to_buffers_with_timestamp(indio_dev, buffer, iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
done: done:

View File

@ -865,6 +865,8 @@ config ROCKCHIP_SARADC
tristate "Rockchip SARADC driver" tristate "Rockchip SARADC driver"
depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST) depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
depends on RESET_CONTROLLER depends on RESET_CONTROLLER
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help help
Say yes here to build support for the SARADC found in SoCs from Say yes here to build support for the SARADC found in SoCs from
Rockchip. Rockchip.

View File

@ -146,6 +146,11 @@ struct ina2xx_chip_info {
int range_vbus; /* Bus voltage maximum in V */ int range_vbus; /* Bus voltage maximum in V */
int pga_gain_vshunt; /* Shunt voltage PGA gain */ int pga_gain_vshunt; /* Shunt voltage PGA gain */
bool allow_async_readout; bool allow_async_readout;
/* data buffer needs space for channel data and timestamp */
struct {
u16 chan[4];
u64 ts __aligned(8);
} scan;
}; };
static const struct ina2xx_config ina2xx_config[] = { static const struct ina2xx_config ina2xx_config[] = {
@ -738,8 +743,6 @@ static int ina2xx_conversion_ready(struct iio_dev *indio_dev)
static int ina2xx_work_buffer(struct iio_dev *indio_dev) static int ina2xx_work_buffer(struct iio_dev *indio_dev)
{ {
struct ina2xx_chip_info *chip = iio_priv(indio_dev); struct ina2xx_chip_info *chip = iio_priv(indio_dev);
/* data buffer needs space for channel data and timestap */
unsigned short data[4 + sizeof(s64)/sizeof(short)];
int bit, ret, i = 0; int bit, ret, i = 0;
s64 time; s64 time;
@ -758,10 +761,10 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
if (ret < 0) if (ret < 0)
return ret; return ret;
data[i++] = val; chip->scan.chan[i++] = val;
} }
iio_push_to_buffers_with_timestamp(indio_dev, data, time); iio_push_to_buffers_with_timestamp(indio_dev, &chip->scan, time);
return 0; return 0;
}; };

View File

@ -36,6 +36,11 @@ struct max1118 {
struct spi_device *spi; struct spi_device *spi;
struct mutex lock; struct mutex lock;
struct regulator *reg; struct regulator *reg;
/* Ensure natural alignment of buffer elements */
struct {
u8 channels[2];
s64 ts __aligned(8);
} scan;
u8 data ____cacheline_aligned; u8 data ____cacheline_aligned;
}; };
@ -166,7 +171,6 @@ static irqreturn_t max1118_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct max1118 *adc = iio_priv(indio_dev); struct max1118 *adc = iio_priv(indio_dev);
u8 data[16] = { }; /* 2x 8-bit ADC data + padding + 8 bytes timestamp */
int scan_index; int scan_index;
int i = 0; int i = 0;
@ -184,10 +188,10 @@ static irqreturn_t max1118_trigger_handler(int irq, void *p)
goto out; goto out;
} }
data[i] = ret; adc->scan.channels[i] = ret;
i++; i++;
} }
iio_push_to_buffers_with_timestamp(indio_dev, data, iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
out: out:
mutex_unlock(&adc->lock); mutex_unlock(&adc->lock);

View File

@ -96,16 +96,12 @@ static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
{ {
int ret; int ret;
mutex_lock(&adc->lock);
ret = i2c_master_send(adc->i2c, &newconfig, 1); ret = i2c_master_send(adc->i2c, &newconfig, 1);
if (ret > 0) { if (ret > 0) {
adc->config = newconfig; adc->config = newconfig;
ret = 0; ret = 0;
} }
mutex_unlock(&adc->lock);
return ret; return ret;
} }
@ -138,6 +134,8 @@ static int mcp3422_read_channel(struct mcp3422 *adc,
u8 config; u8 config;
u8 req_channel = channel->channel; u8 req_channel = channel->channel;
mutex_lock(&adc->lock);
if (req_channel != MCP3422_CHANNEL(adc->config)) { if (req_channel != MCP3422_CHANNEL(adc->config)) {
config = adc->config; config = adc->config;
config &= ~MCP3422_CHANNEL_MASK; config &= ~MCP3422_CHANNEL_MASK;
@ -145,12 +143,18 @@ static int mcp3422_read_channel(struct mcp3422 *adc,
config &= ~MCP3422_PGA_MASK; config &= ~MCP3422_PGA_MASK;
config |= MCP3422_PGA_VALUE(adc->pga[req_channel]); config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
ret = mcp3422_update_config(adc, config); ret = mcp3422_update_config(adc, config);
if (ret < 0) if (ret < 0) {
mutex_unlock(&adc->lock);
return ret; return ret;
}
msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]); msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
} }
return mcp3422_read(adc, value, &config); ret = mcp3422_read(adc, value, &config);
mutex_unlock(&adc->lock);
return ret;
} }
static int mcp3422_read_raw(struct iio_dev *iio, static int mcp3422_read_raw(struct iio_dev *iio,

View File

@ -707,7 +707,7 @@ static int meson_sar_adc_temp_sensor_init(struct iio_dev *indio_dev)
size_t read_len; size_t read_len;
int ret; int ret;
temperature_calib = devm_nvmem_cell_get(&indio_dev->dev, temperature_calib = devm_nvmem_cell_get(indio_dev->dev.parent,
"temperature_calib"); "temperature_calib");
if (IS_ERR(temperature_calib)) { if (IS_ERR(temperature_calib)) {
ret = PTR_ERR(temperature_calib); ret = PTR_ERR(temperature_calib);

View File

@ -33,6 +33,12 @@ struct adc081c {
/* 8, 10 or 12 */ /* 8, 10 or 12 */
int bits; int bits;
/* Ensure natural alignment of buffer elements */
struct {
u16 channel;
s64 ts __aligned(8);
} scan;
}; };
#define REG_CONV_RES 0x00 #define REG_CONV_RES 0x00
@ -128,14 +134,13 @@ static irqreturn_t adc081c_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct adc081c *data = iio_priv(indio_dev); struct adc081c *data = iio_priv(indio_dev);
u16 buf[8]; /* 2 bytes data + 6 bytes padding + 8 bytes timestamp */
int ret; int ret;
ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES); ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES);
if (ret < 0) if (ret < 0)
goto out; goto out;
buf[0] = ret; data->scan.channel = ret;
iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
out: out:
iio_trigger_notify_done(indio_dev->trig); iio_trigger_notify_done(indio_dev->trig);

View File

@ -26,6 +26,11 @@ struct adc084s021 {
struct spi_transfer spi_trans; struct spi_transfer spi_trans;
struct regulator *reg; struct regulator *reg;
struct mutex lock; struct mutex lock;
/* Buffer used to align data */
struct {
__be16 channels[4];
s64 ts __aligned(8);
} scan;
/* /*
* DMA (thus cache coherency maintenance) requires the * DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache line. * transfer buffers to live in their own cache line.
@ -141,14 +146,13 @@ static irqreturn_t adc084s021_buffer_trigger_handler(int irq, void *pollfunc)
struct iio_poll_func *pf = pollfunc; struct iio_poll_func *pf = pollfunc;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct adc084s021 *adc = iio_priv(indio_dev); struct adc084s021 *adc = iio_priv(indio_dev);
__be16 data[8] = {0}; /* 4 * 16-bit words of data + 8 bytes timestamp */
mutex_lock(&adc->lock); mutex_lock(&adc->lock);
if (adc084s021_adc_conversion(adc, &data) < 0) if (adc084s021_adc_conversion(adc, adc->scan.channels) < 0)
dev_err(&adc->spi->dev, "Failed to read data\n"); dev_err(&adc->spi->dev, "Failed to read data\n");
iio_push_to_buffers_with_timestamp(indio_dev, data, iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
mutex_unlock(&adc->lock); mutex_unlock(&adc->lock);
iio_trigger_notify_done(indio_dev->trig); iio_trigger_notify_done(indio_dev->trig);

View File

@ -316,6 +316,7 @@ static const struct iio_chan_spec ads1115_channels[] = {
IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP), IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
}; };
#ifdef CONFIG_PM
static int ads1015_set_power_state(struct ads1015_data *data, bool on) static int ads1015_set_power_state(struct ads1015_data *data, bool on)
{ {
int ret; int ret;
@ -333,6 +334,15 @@ static int ads1015_set_power_state(struct ads1015_data *data, bool on)
return ret < 0 ? ret : 0; return ret < 0 ? ret : 0;
} }
#else /* !CONFIG_PM */
static int ads1015_set_power_state(struct ads1015_data *data, bool on)
{
return 0;
}
#endif /* !CONFIG_PM */
static static
int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val) int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
{ {

View File

@ -78,6 +78,11 @@ struct ccs811_data {
struct iio_trigger *drdy_trig; struct iio_trigger *drdy_trig;
struct gpio_desc *wakeup_gpio; struct gpio_desc *wakeup_gpio;
bool drdy_trig_on; bool drdy_trig_on;
/* Ensures correct alignment of timestamp if present */
struct {
s16 channels[2];
s64 ts __aligned(8);
} scan;
}; };
static const struct iio_chan_spec ccs811_channels[] = { static const struct iio_chan_spec ccs811_channels[] = {
@ -327,17 +332,17 @@ static irqreturn_t ccs811_trigger_handler(int irq, void *p)
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct ccs811_data *data = iio_priv(indio_dev); struct ccs811_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client; struct i2c_client *client = data->client;
s16 buf[8]; /* s16 eCO2 + s16 TVOC + padding + 8 byte timestamp */
int ret; int ret;
ret = i2c_smbus_read_i2c_block_data(client, CCS811_ALG_RESULT_DATA, 4, ret = i2c_smbus_read_i2c_block_data(client, CCS811_ALG_RESULT_DATA,
(u8 *)&buf); sizeof(data->scan.channels),
(u8 *)data->scan.channels);
if (ret != 4) { if (ret != 4) {
dev_err(&client->dev, "cannot read sensor data\n"); dev_err(&client->dev, "cannot read sensor data\n");
goto err; goto err;
} }
iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
err: err:

View File

@ -72,10 +72,13 @@ static void get_default_min_max_freq(enum motionsensor_type type,
switch (type) { switch (type) {
case MOTIONSENSE_TYPE_ACCEL: case MOTIONSENSE_TYPE_ACCEL:
case MOTIONSENSE_TYPE_GYRO:
*min_freq = 12500; *min_freq = 12500;
*max_freq = 100000; *max_freq = 100000;
break; break;
case MOTIONSENSE_TYPE_GYRO:
*min_freq = 25000;
*max_freq = 100000;
break;
case MOTIONSENSE_TYPE_MAG: case MOTIONSENSE_TYPE_MAG:
*min_freq = 5000; *min_freq = 5000;
*max_freq = 25000; *max_freq = 25000;

View File

@ -1243,13 +1243,16 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct ltr501_data *data = iio_priv(indio_dev); struct ltr501_data *data = iio_priv(indio_dev);
u16 buf[8]; struct {
u16 channels[3];
s64 ts __aligned(8);
} scan;
__le16 als_buf[2]; __le16 als_buf[2];
u8 mask = 0; u8 mask = 0;
int j = 0; int j = 0;
int ret, psdata; int ret, psdata;
memset(buf, 0, sizeof(buf)); memset(&scan, 0, sizeof(scan));
/* figure out which data needs to be ready */ /* figure out which data needs to be ready */
if (test_bit(0, indio_dev->active_scan_mask) || if (test_bit(0, indio_dev->active_scan_mask) ||
@ -1268,9 +1271,9 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
if (ret < 0) if (ret < 0)
return ret; return ret;
if (test_bit(0, indio_dev->active_scan_mask)) if (test_bit(0, indio_dev->active_scan_mask))
buf[j++] = le16_to_cpu(als_buf[1]); scan.channels[j++] = le16_to_cpu(als_buf[1]);
if (test_bit(1, indio_dev->active_scan_mask)) if (test_bit(1, indio_dev->active_scan_mask))
buf[j++] = le16_to_cpu(als_buf[0]); scan.channels[j++] = le16_to_cpu(als_buf[0]);
} }
if (mask & LTR501_STATUS_PS_RDY) { if (mask & LTR501_STATUS_PS_RDY) {
@ -1278,10 +1281,10 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
&psdata, 2); &psdata, 2);
if (ret < 0) if (ret < 0)
goto done; goto done;
buf[j++] = psdata & LTR501_PS_DATA_MASK; scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
} }
iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_push_to_buffers_with_timestamp(indio_dev, &scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
done: done:

View File

@ -75,6 +75,11 @@
struct max44000_data { struct max44000_data {
struct mutex lock; struct mutex lock;
struct regmap *regmap; struct regmap *regmap;
/* Ensure naturally aligned timestamp */
struct {
u16 channels[2];
s64 ts __aligned(8);
} scan;
}; };
/* Default scale is set to the minimum of 0.03125 or 1 / (1 << 5) lux */ /* Default scale is set to the minimum of 0.03125 or 1 / (1 << 5) lux */
@ -488,7 +493,6 @@ static irqreturn_t max44000_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct max44000_data *data = iio_priv(indio_dev); struct max44000_data *data = iio_priv(indio_dev);
u16 buf[8]; /* 2x u16 + padding + 8 bytes timestamp */
int index = 0; int index = 0;
unsigned int regval; unsigned int regval;
int ret; int ret;
@ -498,17 +502,17 @@ static irqreturn_t max44000_trigger_handler(int irq, void *p)
ret = max44000_read_alsval(data); ret = max44000_read_alsval(data);
if (ret < 0) if (ret < 0)
goto out_unlock; goto out_unlock;
buf[index++] = ret; data->scan.channels[index++] = ret;
} }
if (test_bit(MAX44000_SCAN_INDEX_PRX, indio_dev->active_scan_mask)) { if (test_bit(MAX44000_SCAN_INDEX_PRX, indio_dev->active_scan_mask)) {
ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, &regval); ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, &regval);
if (ret < 0) if (ret < 0)
goto out_unlock; goto out_unlock;
buf[index] = regval; data->scan.channels[index] = regval;
} }
mutex_unlock(&data->lock); mutex_unlock(&data->lock);
iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
iio_trigger_notify_done(indio_dev->trig); iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED; return IRQ_HANDLED;

View File

@ -366,6 +366,12 @@ struct ak8975_data {
struct iio_mount_matrix orientation; struct iio_mount_matrix orientation;
struct regulator *vdd; struct regulator *vdd;
struct regulator *vid; struct regulator *vid;
/* Ensure natural alignment of timestamp */
struct {
s16 channels[3];
s64 ts __aligned(8);
} scan;
}; };
/* Enable attached power regulator if any. */ /* Enable attached power regulator if any. */
@ -793,7 +799,6 @@ static void ak8975_fill_buffer(struct iio_dev *indio_dev)
const struct i2c_client *client = data->client; const struct i2c_client *client = data->client;
const struct ak_def *def = data->def; const struct ak_def *def = data->def;
int ret; int ret;
s16 buff[8]; /* 3 x 16 bits axis values + 1 aligned 64 bits timestamp */
__le16 fval[3]; __le16 fval[3];
mutex_lock(&data->lock); mutex_lock(&data->lock);
@ -816,12 +821,13 @@ static void ak8975_fill_buffer(struct iio_dev *indio_dev)
mutex_unlock(&data->lock); mutex_unlock(&data->lock);
/* Clamp to valid range. */ /* Clamp to valid range. */
buff[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range); data->scan.channels[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range);
buff[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range); data->scan.channels[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range);
buff[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range); data->scan.channels[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range);
iio_push_to_buffers_with_timestamp(indio_dev, buff, iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
iio_get_time_ns(indio_dev)); iio_get_time_ns(indio_dev));
return; return;
unlock: unlock:

View File

@ -40,6 +40,11 @@ struct mb1232_data {
*/ */
struct completion ranging; struct completion ranging;
int irqnr; int irqnr;
/* Ensure correct alignment of data to push to IIO buffer */
struct {
s16 distance;
s64 ts __aligned(8);
} scan;
}; };
static irqreturn_t mb1232_handle_irq(int irq, void *dev_id) static irqreturn_t mb1232_handle_irq(int irq, void *dev_id)
@ -113,17 +118,13 @@ static irqreturn_t mb1232_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p; struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev; struct iio_dev *indio_dev = pf->indio_dev;
struct mb1232_data *data = iio_priv(indio_dev); struct mb1232_data *data = iio_priv(indio_dev);
/*
* triggered buffer
* 16-bit channel + 48-bit padding + 64-bit timestamp
*/
s16 buffer[8] = { 0 };
buffer[0] = mb1232_read_distance(data); data->scan.distance = mb1232_read_distance(data);
if (buffer[0] < 0) if (data->scan.distance < 0)
goto err; goto err;
iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
pf->timestamp);
err: err:
iio_trigger_notify_done(indio_dev->trig); iio_trigger_notify_done(indio_dev->trig);

View File

@ -379,7 +379,7 @@ static int ib_alloc_cqs(struct ib_device *dev, unsigned int nr_cqes,
{ {
LIST_HEAD(tmp_list); LIST_HEAD(tmp_list);
unsigned int nr_cqs, i; unsigned int nr_cqs, i;
struct ib_cq *cq; struct ib_cq *cq, *n;
int ret; int ret;
if (poll_ctx > IB_POLL_LAST_POOL_TYPE) { if (poll_ctx > IB_POLL_LAST_POOL_TYPE) {
@ -412,7 +412,7 @@ static int ib_alloc_cqs(struct ib_device *dev, unsigned int nr_cqes,
return 0; return 0;
out_free_cqs: out_free_cqs:
list_for_each_entry(cq, &tmp_list, pool_entry) { list_for_each_entry_safe(cq, n, &tmp_list, pool_entry) {
cq->shared = false; cq->shared = false;
ib_free_cq(cq); ib_free_cq(cq);
} }

View File

@ -1801,7 +1801,7 @@ int ib_get_eth_speed(struct ib_device *dev, u8 port_num, u8 *speed, u8 *width)
dev_put(netdev); dev_put(netdev);
if (!rc) { if (!rc && lksettings.base.speed != (u32)SPEED_UNKNOWN) {
netdev_speed = lksettings.base.speed; netdev_speed = lksettings.base.speed;
} else { } else {
netdev_speed = SPEED_1000; netdev_speed = SPEED_1000;

View File

@ -752,12 +752,6 @@ static int bnxt_re_destroy_gsi_sqp(struct bnxt_re_qp *qp)
gsi_sqp = rdev->gsi_ctx.gsi_sqp; gsi_sqp = rdev->gsi_ctx.gsi_sqp;
gsi_sah = rdev->gsi_ctx.gsi_sah; gsi_sah = rdev->gsi_ctx.gsi_sah;
/* remove from active qp list */
mutex_lock(&rdev->qp_lock);
list_del(&gsi_sqp->list);
mutex_unlock(&rdev->qp_lock);
atomic_dec(&rdev->qp_count);
ibdev_dbg(&rdev->ibdev, "Destroy the shadow AH\n"); ibdev_dbg(&rdev->ibdev, "Destroy the shadow AH\n");
bnxt_qplib_destroy_ah(&rdev->qplib_res, bnxt_qplib_destroy_ah(&rdev->qplib_res,
&gsi_sah->qplib_ah, &gsi_sah->qplib_ah,
@ -772,6 +766,12 @@ static int bnxt_re_destroy_gsi_sqp(struct bnxt_re_qp *qp)
} }
bnxt_qplib_free_qp_res(&rdev->qplib_res, &gsi_sqp->qplib_qp); bnxt_qplib_free_qp_res(&rdev->qplib_res, &gsi_sqp->qplib_qp);
/* remove from active qp list */
mutex_lock(&rdev->qp_lock);
list_del(&gsi_sqp->list);
mutex_unlock(&rdev->qp_lock);
atomic_dec(&rdev->qp_count);
kfree(rdev->gsi_ctx.sqp_tbl); kfree(rdev->gsi_ctx.sqp_tbl);
kfree(gsi_sah); kfree(gsi_sah);
kfree(gsi_sqp); kfree(gsi_sqp);
@ -792,11 +792,6 @@ int bnxt_re_destroy_qp(struct ib_qp *ib_qp, struct ib_udata *udata)
unsigned int flags; unsigned int flags;
int rc; int rc;
mutex_lock(&rdev->qp_lock);
list_del(&qp->list);
mutex_unlock(&rdev->qp_lock);
atomic_dec(&rdev->qp_count);
bnxt_qplib_flush_cqn_wq(&qp->qplib_qp); bnxt_qplib_flush_cqn_wq(&qp->qplib_qp);
rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp); rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp);
@ -819,6 +814,11 @@ int bnxt_re_destroy_qp(struct ib_qp *ib_qp, struct ib_udata *udata)
goto sh_fail; goto sh_fail;
} }
mutex_lock(&rdev->qp_lock);
list_del(&qp->list);
mutex_unlock(&rdev->qp_lock);
atomic_dec(&rdev->qp_count);
ib_umem_release(qp->rumem); ib_umem_release(qp->rumem);
ib_umem_release(qp->sumem); ib_umem_release(qp->sumem);
@ -3264,6 +3264,19 @@ static void bnxt_re_process_res_rawqp1_wc(struct ib_wc *wc,
wc->wc_flags |= IB_WC_GRH; wc->wc_flags |= IB_WC_GRH;
} }
static bool bnxt_re_check_if_vlan_valid(struct bnxt_re_dev *rdev,
u16 vlan_id)
{
/*
* Check if the vlan is configured in the host. If not configured, it
* can be a transparent VLAN. So dont report the vlan id.
*/
if (!__vlan_find_dev_deep_rcu(rdev->netdev,
htons(ETH_P_8021Q), vlan_id))
return false;
return true;
}
static bool bnxt_re_is_vlan_pkt(struct bnxt_qplib_cqe *orig_cqe, static bool bnxt_re_is_vlan_pkt(struct bnxt_qplib_cqe *orig_cqe,
u16 *vid, u8 *sl) u16 *vid, u8 *sl)
{ {
@ -3332,9 +3345,11 @@ static void bnxt_re_process_res_shadow_qp_wc(struct bnxt_re_qp *gsi_sqp,
wc->src_qp = orig_cqe->src_qp; wc->src_qp = orig_cqe->src_qp;
memcpy(wc->smac, orig_cqe->smac, ETH_ALEN); memcpy(wc->smac, orig_cqe->smac, ETH_ALEN);
if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) { if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) {
wc->vlan_id = vlan_id; if (bnxt_re_check_if_vlan_valid(rdev, vlan_id)) {
wc->sl = sl; wc->vlan_id = vlan_id;
wc->wc_flags |= IB_WC_WITH_VLAN; wc->sl = sl;
wc->wc_flags |= IB_WC_WITH_VLAN;
}
} }
wc->port_num = 1; wc->port_num = 1;
wc->vendor_err = orig_cqe->status; wc->vendor_err = orig_cqe->status;

View File

@ -1009,7 +1009,6 @@ static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
{ {
struct bnxt_re_ring_attr rattr = {}; struct bnxt_re_ring_attr rattr = {};
struct bnxt_qplib_ctx *qplib_ctx;
int num_vec_created = 0; int num_vec_created = 0;
int rc = 0, i; int rc = 0, i;
u8 type; u8 type;
@ -1032,13 +1031,11 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
if (rc) if (rc)
goto dealloc_res; goto dealloc_res;
qplib_ctx = &rdev->qplib_ctx;
for (i = 0; i < rdev->num_msix - 1; i++) { for (i = 0; i < rdev->num_msix - 1; i++) {
struct bnxt_qplib_nq *nq; struct bnxt_qplib_nq *nq;
nq = &rdev->nq[i]; nq = &rdev->nq[i];
nq->hwq.max_elements = (qplib_ctx->cq_count + nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
qplib_ctx->srqc_count + 2);
rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]); rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
if (rc) { if (rc) {
ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x", ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",

View File

@ -818,6 +818,7 @@ int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
u16 cmd_flags = 0; u16 cmd_flags = 0;
u32 qp_flags = 0; u32 qp_flags = 0;
u8 pg_sz_lvl; u8 pg_sz_lvl;
u32 tbl_indx;
int rc; int rc;
RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags); RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags);
@ -907,8 +908,9 @@ int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
rq->dbinfo.db = qp->dpi->dbr; rq->dbinfo.db = qp->dpi->dbr;
rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
} }
rcfw->qp_tbl[qp->id].qp_id = qp->id; tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
return 0; return 0;
@ -935,10 +937,10 @@ static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size)
sq = &qp->sq; sq = &qp->sq;
hwq = &sq->hwq; hwq = &sq->hwq;
/* First psn entry */
fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg); fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg);
if (!IS_ALIGNED(fpsne, PAGE_SIZE)) if (!IS_ALIGNED(fpsne, PAGE_SIZE))
indx_pad = ALIGN(fpsne, PAGE_SIZE) / size; indx_pad = (fpsne & ~PAGE_MASK) / size;
hwq->pad_pgofft = indx_pad; hwq->pad_pgofft = indx_pad;
hwq->pad_pg = (u64 *)psn_pg; hwq->pad_pg = (u64 *)psn_pg;
hwq->pad_stride = size; hwq->pad_stride = size;
@ -959,6 +961,7 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
u16 cmd_flags = 0; u16 cmd_flags = 0;
u32 qp_flags = 0; u32 qp_flags = 0;
u8 pg_sz_lvl; u8 pg_sz_lvl;
u32 tbl_indx;
u16 nsge; u16 nsge;
RCFW_CMD_PREP(req, CREATE_QP, cmd_flags); RCFW_CMD_PREP(req, CREATE_QP, cmd_flags);
@ -1111,8 +1114,9 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
rq->dbinfo.db = qp->dpi->dbr; rq->dbinfo.db = qp->dpi->dbr;
rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
} }
rcfw->qp_tbl[qp->id].qp_id = qp->id; tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
return 0; return 0;
fail: fail:
@ -1457,10 +1461,12 @@ int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
struct cmdq_destroy_qp req; struct cmdq_destroy_qp req;
struct creq_destroy_qp_resp resp; struct creq_destroy_qp_resp resp;
u16 cmd_flags = 0; u16 cmd_flags = 0;
u32 tbl_indx;
int rc; int rc;
rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID; tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
rcfw->qp_tbl[qp->id].qp_handle = NULL; rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID;
rcfw->qp_tbl[tbl_indx].qp_handle = NULL;
RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags); RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags);
@ -1468,8 +1474,8 @@ int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
(void *)&resp, NULL, 0); (void *)&resp, NULL, 0);
if (rc) { if (rc) {
rcfw->qp_tbl[qp->id].qp_id = qp->id; rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
rcfw->qp_tbl[qp->id].qp_handle = qp; rcfw->qp_tbl[tbl_indx].qp_handle = qp;
return rc; return rc;
} }

View File

@ -307,14 +307,15 @@ static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw,
__le16 mcookie; __le16 mcookie;
u16 cookie; u16 cookie;
int rc = 0; int rc = 0;
u32 qp_id; u32 qp_id, tbl_indx;
pdev = rcfw->pdev; pdev = rcfw->pdev;
switch (qp_event->event) { switch (qp_event->event) {
case CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION: case CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION:
err_event = (struct creq_qp_error_notification *)qp_event; err_event = (struct creq_qp_error_notification *)qp_event;
qp_id = le32_to_cpu(err_event->xid); qp_id = le32_to_cpu(err_event->xid);
qp = rcfw->qp_tbl[qp_id].qp_handle; tbl_indx = map_qp_id_to_tbl_indx(qp_id, rcfw);
qp = rcfw->qp_tbl[tbl_indx].qp_handle;
dev_dbg(&pdev->dev, "Received QP error notification\n"); dev_dbg(&pdev->dev, "Received QP error notification\n");
dev_dbg(&pdev->dev, dev_dbg(&pdev->dev,
"qpid 0x%x, req_err=0x%x, resp_err=0x%x\n", "qpid 0x%x, req_err=0x%x, resp_err=0x%x\n",
@ -615,8 +616,9 @@ int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res,
cmdq->bmap_size = bmap_size; cmdq->bmap_size = bmap_size;
rcfw->qp_tbl_size = qp_tbl_sz; /* Allocate one extra to hold the QP1 entries */
rcfw->qp_tbl = kcalloc(qp_tbl_sz, sizeof(struct bnxt_qplib_qp_node), rcfw->qp_tbl_size = qp_tbl_sz + 1;
rcfw->qp_tbl = kcalloc(rcfw->qp_tbl_size, sizeof(struct bnxt_qplib_qp_node),
GFP_KERNEL); GFP_KERNEL);
if (!rcfw->qp_tbl) if (!rcfw->qp_tbl)
goto fail; goto fail;

Some files were not shown because too many files have changed in this diff Show More