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drm/radeon: fill in rb backend map on evergreen/ni.
This looks to have never gotten filled in, and it seems to trigger a bug in mesa. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reported-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3513,6 +3513,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.evergreen.max_backends,
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tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.evergreen.max_backends,
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EVERGREEN_MAX_BACKENDS, disabled_rb_mask);
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EVERGREEN_MAX_BACKENDS, disabled_rb_mask);
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}
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}
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rdev->config.evergreen.backend_map = tmp;
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WREG32(GB_BACKEND_MAP, tmp);
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WREG32(GB_BACKEND_MAP, tmp);
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WREG32(CGTS_SYS_TCC_DISABLE, 0);
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WREG32(CGTS_SYS_TCC_DISABLE, 0);
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@ -1148,6 +1148,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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rdev->config.cayman.max_shader_engines,
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rdev->config.cayman.max_shader_engines,
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CAYMAN_MAX_BACKENDS, disabled_rb_mask);
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CAYMAN_MAX_BACKENDS, disabled_rb_mask);
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}
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}
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rdev->config.cayman.backend_map = tmp;
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WREG32(GB_BACKEND_MAP, tmp);
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WREG32(GB_BACKEND_MAP, tmp);
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cgts_tcc_disable = 0xffff0000;
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cgts_tcc_disable = 0xffff0000;
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