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ARM i.MX fixes for v3.5-rc5
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commit
811dde659f
@ -201,7 +201,6 @@ int __init mx35_clocks_init()
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pr_err("i.MX35 clk %d: register failed with %ld\n",
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i, PTR_ERR(clk[i]));
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clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
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clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
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clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
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@ -264,6 +263,14 @@ int __init mx35_clocks_init()
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clk_prepare_enable(clk[iim_gate]);
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clk_prepare_enable(clk[emi_gate]);
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/*
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* SCC is needed to boot via mmc after a watchdog reset. The clock code
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* before conversion to common clk also enabled UART1 (which isn't
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* handled here and not needed for mmc) and IIM (which is enabled
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* unconditionally above).
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*/
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clk_prepare_enable(clk[scc_gate]);
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imx_print_silicon_rev("i.MX35", mx35_revision());
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#ifdef CONFIG_MXC_USE_EPIT
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@ -38,7 +38,7 @@
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/system.h>
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#include <asm/system_info.h>
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#include <mach/common.h>
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#include <mach/iomux-mx27.h>
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