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PCI: rcar: Add error interrupt handling
Add option to enable interrupts to report any errors from the AHB-PCI bridge to help find any issues with the bridge when in use. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
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@ -39,9 +39,26 @@
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#define RCAR_PCI_INT_ENABLE_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x20)
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#define RCAR_PCI_INT_STATUS_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x24)
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#define RCAR_PCI_INT_SIGTABORT (1 << 0)
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#define RCAR_PCI_INT_SIGRETABORT (1 << 1)
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#define RCAR_PCI_INT_REMABORT (1 << 2)
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#define RCAR_PCI_INT_PERR (1 << 3)
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#define RCAR_PCI_INT_SIGSERR (1 << 4)
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#define RCAR_PCI_INT_RESERR (1 << 5)
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#define RCAR_PCI_INT_WIN1ERR (1 << 12)
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#define RCAR_PCI_INT_WIN2ERR (1 << 13)
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#define RCAR_PCI_INT_A (1 << 16)
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#define RCAR_PCI_INT_B (1 << 17)
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#define RCAR_PCI_INT_PME (1 << 19)
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#define RCAR_PCI_INT_ALLERRORS (RCAR_PCI_INT_SIGTABORT | \
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RCAR_PCI_INT_SIGRETABORT | \
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RCAR_PCI_INT_SIGRETABORT | \
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RCAR_PCI_INT_REMABORT | \
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RCAR_PCI_INT_PERR | \
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RCAR_PCI_INT_SIGSERR | \
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RCAR_PCI_INT_RESERR | \
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RCAR_PCI_INT_WIN1ERR | \
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RCAR_PCI_INT_WIN2ERR)
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#define RCAR_AHB_BUS_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x30)
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#define RCAR_AHB_BUS_MMODE_HTRANS (1 << 0)
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@ -164,6 +181,46 @@ static int __init rcar_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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return priv->irq;
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}
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#ifdef CONFIG_PCI_DEBUG
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/* if debug enabled, then attach an error handler irq to the bridge */
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static irqreturn_t rcar_pci_err_irq(int irq, void *pw)
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{
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struct rcar_pci_priv *priv = pw;
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u32 status = ioread32(priv->reg + RCAR_PCI_INT_STATUS_REG);
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if (status & RCAR_PCI_INT_ALLERRORS) {
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dev_err(priv->dev, "error irq: status %08x\n", status);
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/* clear the error(s) */
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iowrite32(status & RCAR_PCI_INT_ALLERRORS,
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priv->reg + RCAR_PCI_INT_STATUS_REG);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static void rcar_pci_setup_errirq(struct rcar_pci_priv *priv)
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{
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int ret;
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u32 val;
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ret = devm_request_irq(priv->dev, priv->irq, rcar_pci_err_irq,
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IRQF_SHARED, "error irq", priv);
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if (ret) {
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dev_err(priv->dev, "cannot claim IRQ for error handling\n");
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return;
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}
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val = ioread32(priv->reg + RCAR_PCI_INT_ENABLE_REG);
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val |= RCAR_PCI_INT_ALLERRORS;
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iowrite32(val, priv->reg + RCAR_PCI_INT_ENABLE_REG);
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}
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#else
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static inline void rcar_pci_setup_errirq(struct rcar_pci_priv *priv) { }
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#endif
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/* PCI host controller setup */
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static int __init rcar_pci_setup(int nr, struct pci_sys_data *sys)
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{
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@ -224,6 +281,9 @@ static int __init rcar_pci_setup(int nr, struct pci_sys_data *sys)
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iowrite32(RCAR_PCI_INT_A | RCAR_PCI_INT_B | RCAR_PCI_INT_PME,
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reg + RCAR_PCI_INT_ENABLE_REG);
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if (priv->irq > 0)
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rcar_pci_setup_errirq(priv);
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/* Add PCI resources */
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pci_add_resource(&sys->resources, &priv->io_res);
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pci_add_resource(&sys->resources, &priv->mem_res);
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