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pinctrl: renesas: Optimize sh_pfc_pin_config

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Shrink sh_pfc_pin_config from 8 to 2 bytes:
  - The mux_set flag can be removed, as a non-zero mark value means the
    same (zero = PINMUX_RESERVED is an invalid mark value),
  - The gpio_enabled flag needs only a single bit,
  - Mark values are small integers, and can easily fit in a 15-bit
    bitfield.

This saves 6 bytes per pin when allocating the sh_pfc_pinctrl.configs
array, i.e. it reduces run-time memory consumption by ca. 1.5 KiB.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201028151637.1734130-5-geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2020-10-28 16:16:33 +01:00
parent eb9d673f94
commit 8019938a85
1 changed files with 4 additions and 6 deletions
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10
drivers/pinctrl/renesas/pinctrl.c
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@ -26,9 +26,8 @@
#include "../pinconf.h"
struct sh_pfc_pin_config {
unsigned int mux_mark;
bool mux_set;
bool gpio_enabled;
u16 gpio_enabled:1;
u16 mux_mark:15;
};
struct sh_pfc_pinctrl {
@ -371,12 +370,11 @@ static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
goto done;
}
/* All group pins are configured, mark the pins as mux_set */
/* All group pins are configured, mark the pins as muxed */
for (i = 0; i < grp->nr_pins; ++i) {
int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
cfg->mux_set = true;
cfg->mux_mark = grp->mux[i];
}
@ -432,7 +430,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
spin_lock_irqsave(&pfc->lock, flags);
cfg->gpio_enabled = false;
/* If mux is already set, this configures it here */
if (cfg->mux_set)
if (cfg->mux_mark)
sh_pfc_config_mux(pfc, cfg->mux_mark, PINMUX_TYPE_FUNCTION);
spin_unlock_irqrestore(&pfc->lock, flags);
}