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Blackfin arch: allow clkin_hz to be specified on the command line
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -81,6 +81,8 @@ static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
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DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
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static int early_init_clkin_hz(char *buf);
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#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
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void __init generate_cplb_tables(void)
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{
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@ -436,6 +438,9 @@ static __init void parse_cmdline_early(char *cmdline_p)
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reserved_mem_icache_on = 1;
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}
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}
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} else if (!memcmp(to, "clkin_hz=", 9)) {
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to += 9;
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early_init_clkin_hz(to);
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} else if (!memcmp(to, "earlyprintk=", 12)) {
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to += 12;
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setup_early_printk(to);
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@ -937,6 +942,19 @@ static int __init topology_init(void)
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subsys_initcall(topology_init);
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/* Get the input clock frequency */
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static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
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static u_long get_clkin_hz(void)
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{
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return cached_clkin_hz;
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}
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static int __init early_init_clkin_hz(char *buf)
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{
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cached_clkin_hz = simple_strtoul(buf, NULL, 0);
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return 1;
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}
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early_param("clkin_hz=", early_init_clkin_hz);
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/* Get the voltage input multiplier */
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static u_long cached_vco_pll_ctl, cached_vco;
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static u_long get_vco(void)
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@ -953,7 +971,7 @@ static u_long get_vco(void)
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if (0 == msel)
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msel = 64;
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cached_vco = CONFIG_CLKIN_HZ;
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cached_vco = get_clkin_hz();
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cached_vco >>= (1 & pll_ctl); /* DF bit */
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cached_vco *= msel;
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return cached_vco;
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@ -966,7 +984,7 @@ u_long get_cclk(void)
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u_long csel, ssel;
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if (bfin_read_PLL_STAT() & 0x1)
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return CONFIG_CLKIN_HZ;
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return get_clkin_hz();
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ssel = bfin_read_PLL_DIV();
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if (ssel == cached_cclk_pll_div)
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@ -991,7 +1009,7 @@ u_long get_sclk(void)
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u_long ssel;
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if (bfin_read_PLL_STAT() & 0x1)
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return CONFIG_CLKIN_HZ;
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return get_clkin_hz();
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ssel = bfin_read_PLL_DIV();
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if (ssel == cached_sclk_pll_div)
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