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usb: xhci: add a quirk bit for ssic port unused
Two workarounds introduced by commitb8cb91e058
("xhci: Workaround for PME stuck issues in Intel xhci") and commitabce329c27
("xhci: Workaround to get D3 working in Intel xHCI") share a single quirk bit XHCI_PME_STUCK_QUIRK. These two workarounds actually are different and might happen on different hardwares. Need to separate them by adding a quirk bit for the later. Cc: stable@vger.kernel.org Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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parent
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@ -156,6 +156,10 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
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xhci->quirks |= XHCI_PME_STUCK_QUIRK;
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}
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
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xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
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}
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if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
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pdev->device == PCI_DEVICE_ID_EJ168) {
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xhci->quirks |= XHCI_RESET_ON_RESUME;
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@ -314,46 +318,47 @@ static void xhci_pci_remove(struct pci_dev *dev)
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* SSIC PORT need to be marked as "unused" before putting xHCI
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* into D3. After D3 exit, the SSIC port need to be marked as "used".
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* Without this change, xHCI might not enter D3 state.
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* Make sure PME works on some Intel xHCI controllers by writing 1 to clear
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* the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
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*/
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static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
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static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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u32 val;
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void __iomem *reg;
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int i;
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
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for (i = 0; i < SSIC_PORT_NUM; i++) {
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reg = (void __iomem *) xhci->cap_regs +
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SSIC_PORT_CFG2 +
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i * SSIC_PORT_CFG2_OFFSET;
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for (i = 0; i < SSIC_PORT_NUM; i++) {
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reg = (void __iomem *) xhci->cap_regs +
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SSIC_PORT_CFG2 +
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i * SSIC_PORT_CFG2_OFFSET;
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/* Notify SSIC that SSIC profile programming is not done. */
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val = readl(reg) & ~PROG_DONE;
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writel(val, reg);
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/*
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* Notify SSIC that SSIC profile programming
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* is not done.
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*/
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val = readl(reg) & ~PROG_DONE;
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writel(val, reg);
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/* Mark SSIC port as unused(suspend) or used(resume) */
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val = readl(reg);
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if (suspend)
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val |= SSIC_PORT_UNUSED;
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else
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val &= ~SSIC_PORT_UNUSED;
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writel(val, reg);
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/* Mark SSIC port as unused(suspend) or used(resume) */
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val = readl(reg);
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if (suspend)
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val |= SSIC_PORT_UNUSED;
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else
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val &= ~SSIC_PORT_UNUSED;
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writel(val, reg);
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/* Notify SSIC that SSIC profile programming is done */
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val = readl(reg) | PROG_DONE;
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writel(val, reg);
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readl(reg);
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}
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/* Notify SSIC that SSIC profile programming is done */
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val = readl(reg) | PROG_DONE;
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writel(val, reg);
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readl(reg);
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}
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}
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/*
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* Make sure PME works on some Intel xHCI controllers by writing 1 to clear
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* the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
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*/
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static void xhci_pme_quirk(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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void __iomem *reg;
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u32 val;
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reg = (void __iomem *) xhci->cap_regs + 0x80a4;
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val = readl(reg);
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@ -374,7 +379,10 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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pdev->no_d3cold = true;
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if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
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xhci_pme_quirk(hcd, true);
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xhci_pme_quirk(hcd);
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if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
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xhci_ssic_port_unused_quirk(hcd, true);
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return xhci_suspend(xhci, do_wakeup);
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}
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@ -406,8 +414,11 @@ static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
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if (pdev->vendor == PCI_VENDOR_ID_INTEL)
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usb_enable_intel_xhci_ports(pdev);
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if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
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xhci_ssic_port_unused_quirk(hcd, false);
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if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
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xhci_pme_quirk(hcd, false);
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xhci_pme_quirk(hcd);
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retval = xhci_resume(xhci, hibernated);
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return retval;
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@ -1631,6 +1631,7 @@ struct xhci_hcd {
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#define XHCI_BROKEN_STREAMS (1 << 19)
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#define XHCI_PME_STUCK_QUIRK (1 << 20)
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#define XHCI_MTK_HOST (1 << 21)
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#define XHCI_SSIC_PORT_UNUSED (1 << 22)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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/* There are two roothubs to keep track of bus suspend info for */
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