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ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle Correction(DCC) to operate safely at frequencies >= 1.4GHz. Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides this support. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -277,7 +277,7 @@
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dpll_mpu_ck: dpll_mpu_ck {
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#clock-cells = <0>;
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compatible = "ti,omap4-dpll-clock";
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compatible = "ti,omap5-mpu-dpll-clock";
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clocks = <&sys_clkin1>, <&mpu_dpll_hs_clk_div>;
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reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
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};
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@ -362,7 +362,7 @@
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dpll_mpu_ck: dpll_mpu_ck {
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#clock-cells = <0>;
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compatible = "ti,omap4-dpll-clock";
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compatible = "ti,omap5-mpu-dpll-clock";
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clocks = <&sys_clkin>, <&mpu_dpll_hs_clk_div>;
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reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
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};
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