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drm/radeon/si_dpm: workaround for SI kickers
Consolidate existing quirks. Fixes stability issues on some kickers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2999,6 +2999,49 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
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int i;
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struct si_dpm_quirk *p = si_dpm_quirk_list;
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/* limit all SI kickers */
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if (rdev->family == CHIP_PITCAIRN) {
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if ((rdev->pdev->revision == 0x81) ||
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(rdev->pdev->device == 0x6810) ||
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(rdev->pdev->device == 0x6811) ||
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(rdev->pdev->device == 0x6816) ||
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(rdev->pdev->device == 0x6817) ||
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(rdev->pdev->device == 0x6806))
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max_mclk = 120000;
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} else if (rdev->family == CHIP_VERDE) {
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if ((rdev->pdev->revision == 0x81) ||
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(rdev->pdev->revision == 0x83) ||
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(rdev->pdev->revision == 0x87) ||
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(rdev->pdev->device == 0x6820) ||
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(rdev->pdev->device == 0x6821) ||
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(rdev->pdev->device == 0x6822) ||
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(rdev->pdev->device == 0x6823) ||
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(rdev->pdev->device == 0x682A) ||
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(rdev->pdev->device == 0x682B)) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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} else if (rdev->family == CHIP_OLAND) {
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if ((rdev->pdev->revision == 0xC7) ||
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(rdev->pdev->revision == 0x80) ||
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(rdev->pdev->revision == 0x81) ||
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(rdev->pdev->revision == 0x83) ||
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(rdev->pdev->device == 0x6604) ||
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(rdev->pdev->device == 0x6605)) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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} else if (rdev->family == CHIP_HAINAN) {
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if ((rdev->pdev->revision == 0x81) ||
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(rdev->pdev->revision == 0x83) ||
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(rdev->pdev->revision == 0xC3) ||
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(rdev->pdev->device == 0x6664) ||
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(rdev->pdev->device == 0x6665) ||
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(rdev->pdev->device == 0x6667)) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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}
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/* Apply dpm quirks */
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while (p && p->chip_device != 0) {
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if (rdev->pdev->vendor == p->chip_vendor &&
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@ -3011,22 +3054,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
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}
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++p;
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}
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/* limit mclk on all R7 370 parts for stability */
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if (rdev->pdev->device == 0x6811 &&
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rdev->pdev->revision == 0x81)
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max_mclk = 120000;
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/* limit sclk/mclk on Jet parts for stability */
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if (rdev->pdev->device == 0x6665 &&
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rdev->pdev->revision == 0xc3) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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/* limit clocks on HD8600 series */
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if (rdev->pdev->device == 0x6660 &&
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rdev->pdev->revision == 0x83) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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if (rps->vce_active) {
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rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
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