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MIPS: MSP71xx: Use __flush_cache_all instead of flush_cache_all.
Flushing caches is probably sensible on reset but flush_cache_all has been a no-op for a very long time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -118,7 +118,7 @@ void msp_restart(char *command)
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/* No chip-specific reset code, just jump to the ROM reset vector */
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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flush_cache_all();
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__flush_cache_all();
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write_c0_wired(0);
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__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
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