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powerpc/32: Use START_EXCEPTION() as much as possible
Everywhere where it is possible, use START_EXCEPTION(). This will help for proper exception init in future patches. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/d47c1cc242bbbef8658327503726abdaef9b63ef.1615552867.git.christophe.leroy@csgroup.eu
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@ -247,17 +247,15 @@ _ENTRY(crit_esr)
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EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_STD)
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/* 0x1000 - Programmable Interval Timer (PIT) Exception */
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. = 0x1000
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START_EXCEPTION(0x1000, DecrementerTrap)
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b Decrementer
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/* 0x1010 - Fixed Interval Timer (FIT) Exception
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*/
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. = 0x1010
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/* 0x1010 - Fixed Interval Timer (FIT) Exception */
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START_EXCEPTION(0x1010, FITExceptionTrap)
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b FITException
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/* 0x1020 - Watchdog Timer (WDT) Exception
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*/
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. = 0x1020
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/* 0x1020 - Watchdog Timer (WDT) Exception */
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START_EXCEPTION(0x1020, WDTExceptionTrap)
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b WDTException
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/* 0x1100 - Data TLB Miss Exception
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@ -121,8 +121,7 @@ instruction_counter:
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EXCEPTION(0x100, Reset, system_reset_exception, EXC_XFER_STD)
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/* Machine check */
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. = 0x200
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MachineCheck:
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START_EXCEPTION(0x200, MachineCheck)
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EXCEPTION_PROLOG handle_dar_dsisr=1
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addi r3,r1,STACK_FRAME_OVERHEAD
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EXC_XFER_STD(0x200, machine_check_exception)
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@ -131,8 +130,7 @@ MachineCheck:
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EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
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/* Alignment exception */
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. = 0x600
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Alignment:
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START_EXCEPTION(0x600, Alignment)
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EXCEPTION_PROLOG handle_dar_dsisr=1
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addi r3,r1,STACK_FRAME_OVERHEAD
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b .Lalignment_exception_ool
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@ -149,8 +147,7 @@ Alignment:
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EXC_XFER_STD(0x600, alignment_exception)
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/* System call */
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. = 0xc00
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SystemCall:
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START_EXCEPTION(0xc00, SystemCall)
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SYSCALL_ENTRY 0xc00
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/* Single step - not used on 601 */
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@ -161,7 +158,6 @@ SystemCall:
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*/
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EXCEPTION(0x1000, SoftEmu, emulation_assist_interrupt, EXC_XFER_STD)
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. = 0x1100
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/*
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* For the MPC8xx, this is a software tablewalk to load the instruction
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* TLB. The task switch loads the M_TWB register with the pointer to the first
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@ -183,7 +179,7 @@ SystemCall:
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#define INVALIDATE_ADJACENT_PAGES_CPU15(addr, tmp)
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#endif
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InstructionTLBMiss:
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START_EXCEPTION(0x1100, InstructionTLBMiss)
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mtspr SPRN_SPRG_SCRATCH2, r10
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mtspr SPRN_M_TW, r11
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@ -239,8 +235,7 @@ InstructionTLBMiss:
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rfi
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#endif
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. = 0x1200
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DataStoreTLBMiss:
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START_EXCEPTION(0x1200, DataStoreTLBMiss)
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mtspr SPRN_SPRG_SCRATCH2, r10
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mtspr SPRN_M_TW, r11
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mfcr r11
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@ -303,8 +298,7 @@ DataStoreTLBMiss:
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* to many reasons, such as executing guarded memory or illegal instruction
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* addresses. There is nothing to do but handle a big time error fault.
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*/
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. = 0x1300
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InstructionTLBError:
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START_EXCEPTION(0x1300, InstructionTLBError)
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EXCEPTION_PROLOG
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andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
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andis. r10,r9,SRR1_ISI_NOPT@h
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@ -320,8 +314,7 @@ InstructionTLBError:
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* many reasons, including a dirty update to a pte. We bail out to
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* a higher level function that can handle it.
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*/
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. = 0x1400
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DataTLBError:
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START_EXCEPTION(0x1400, DataTLBError)
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EXCEPTION_PROLOG_0 handle_dar_dsisr=1
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mfspr r11, SPRN_DAR
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cmpwi cr1, r11, RPN_PATTERN
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@ -354,8 +347,7 @@ do_databreakpoint:
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stw r4,_DAR(r11)
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EXC_XFER_STD(0x1c00, do_break)
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. = 0x1c00
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DataBreakpoint:
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START_EXCEPTION(0x1c00, DataBreakpoint)
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EXCEPTION_PROLOG_0 handle_dar_dsisr=1
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mfspr r11, SPRN_SRR0
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cmplwi cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l
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@ -368,8 +360,7 @@ DataBreakpoint:
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rfi
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#ifdef CONFIG_PERF_EVENTS
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. = 0x1d00
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InstructionBreakpoint:
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START_EXCEPTION(0x1d00, InstructionBreakpoint)
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mtspr SPRN_SPRG_SCRATCH0, r10
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lwz r10, (instruction_counter - PAGE_OFFSET)@l(0)
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addi r10, r10, -1
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@ -255,9 +255,7 @@ __secondary_hold_acknowledge:
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* pointer when we take an exception from supervisor mode.)
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* -- paulus.
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*/
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. = 0x200
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DO_KVM 0x200
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MachineCheck:
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START_EXCEPTION(0x200, MachineCheck)
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EXCEPTION_PROLOG_0
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#ifdef CONFIG_PPC_CHRP
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mtspr SPRN_SPRG_SCRATCH2,r1
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@ -278,9 +276,7 @@ MachineCheck:
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#endif
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/* Data access exception. */
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. = 0x300
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DO_KVM 0x300
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DataAccess:
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START_EXCEPTION(0x300, DataAccess)
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#ifdef CONFIG_PPC_BOOK3S_604
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BEGIN_MMU_FTR_SECTION
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mtspr SPRN_SPRG_SCRATCH2,r10
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@ -304,9 +300,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
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b handle_page_fault_tramp_1
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/* Instruction access exception. */
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. = 0x400
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DO_KVM 0x400
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InstructionAccess:
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START_EXCEPTION(0x400, InstructionAccess)
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mtspr SPRN_SPRG_SCRATCH0,r10
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mtspr SPRN_SPRG_SCRATCH1,r11
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mfspr r10, SPRN_SPRG_THREAD
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@ -336,9 +330,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
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EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
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/* Alignment exception */
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. = 0x600
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DO_KVM 0x600
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Alignment:
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START_EXCEPTION(0x600, Alignment)
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EXCEPTION_PROLOG handle_dar_dsisr=1
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addi r3,r1,STACK_FRAME_OVERHEAD
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b alignment_exception_tramp
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@ -347,9 +339,7 @@ Alignment:
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EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
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/* Floating-point unavailable */
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. = 0x800
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DO_KVM 0x800
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FPUnavailable:
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START_EXCEPTION(0x800, FPUnavailable)
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#ifdef CONFIG_PPC_FPU
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BEGIN_FTR_SECTION
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/*
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@ -375,9 +365,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
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EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_STD)
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/* System call */
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. = 0xc00
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DO_KVM 0xc00
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SystemCall:
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START_EXCEPTION(0xc00, SystemCall)
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SYSCALL_ENTRY 0xc00
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EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
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@ -391,12 +379,10 @@ SystemCall:
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* non-altivec kernel running on a machine with altivec just
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* by executing an altivec instruction.
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*/
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. = 0xf00
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DO_KVM 0xf00
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START_EXCEPTION(0xf00, PerformanceMonitorTrap)
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b PerformanceMonitor
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. = 0xf20
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DO_KVM 0xf20
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START_EXCEPTION(0xf20, AltiVecUnavailableTrap)
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b AltiVecUnavailable
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/*
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