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bpf/tests: Add test of LDX_MEM with operand aliasing

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This patch adds a set of tests of BPF_LDX_MEM where both operand registers
are the same register. Mainly testing 32-bit JITs that may load a 64-bit
value in two 32-bit loads, and must not overwrite the address register.

Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20211001130348.3670534-11-johan.almbladh@anyfinetworks.com
This commit is contained in:
Johan Almbladh 2021-10-01 15:03:48 +02:00 committed by Daniel Borkmann
parent 68813605de
commit 7bceeb9572
1 changed files with 58 additions and 0 deletions
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58
lib/test_bpf.c
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@ -11133,6 +11133,64 @@ static struct bpf_test tests[] = {
{},
{ { 0, 2 } },
},
/* BPF_LDX_MEM with operand aliasing */
{
"LDX_MEM_B: operand register aliasing",
.u.insns_int = {
BPF_ST_MEM(BPF_B, R10, -8, 123),
BPF_MOV64_REG(R0, R10),
BPF_LDX_MEM(BPF_B, R0, R0, -8),
BPF_EXIT_INSN(),
},
INTERNAL,
{ },
{ { 0, 123 } },
.stack_depth = 8,
},
{
"LDX_MEM_H: operand register aliasing",
.u.insns_int = {
BPF_ST_MEM(BPF_H, R10, -8, 12345),
BPF_MOV64_REG(R0, R10),
BPF_LDX_MEM(BPF_H, R0, R0, -8),
BPF_EXIT_INSN(),
},
INTERNAL,
{ },
{ { 0, 12345 } },
.stack_depth = 8,
},
{
"LDX_MEM_W: operand register aliasing",
.u.insns_int = {
BPF_ST_MEM(BPF_W, R10, -8, 123456789),
BPF_MOV64_REG(R0, R10),
BPF_LDX_MEM(BPF_W, R0, R0, -8),
BPF_EXIT_INSN(),
},
INTERNAL,
{ },
{ { 0, 123456789 } },
.stack_depth = 8,
},
{
"LDX_MEM_DW: operand register aliasing",
.u.insns_int = {
BPF_LD_IMM64(R1, 0x123456789abcdefULL),
BPF_STX_MEM(BPF_DW, R10, R1, -8),
BPF_MOV64_REG(R0, R10),
BPF_LDX_MEM(BPF_DW, R0, R0, -8),
BPF_ALU64_REG(BPF_SUB, R0, R1),
BPF_MOV64_REG(R1, R0),
BPF_ALU64_IMM(BPF_RSH, R1, 32),
BPF_ALU64_REG(BPF_OR, R0, R1),
BPF_EXIT_INSN(),
},
INTERNAL,
{ },
{ { 0, 0 } },
.stack_depth = 8,
},
/*
* Register (non-)clobbering tests for the case where a JIT implements
* complex ALU or ATOMIC operations via function calls. If so, the