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serial: etraxfs-uart: use mctrl_gpio helpers for handling modem signals
In order to use the mctrl_gpio helpers, we change the DT bindings: ri-gpios renamed to rng-gpios. cd-gpios renamed to dcd-gpios. However, no in-tree dts/dtsi specifies these, so no worries. Signed-off-by: Niklas Cassel <nks@flawful.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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7b9c5162c1
@ -6,7 +6,7 @@ Required properties:
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- interrupts: device interrupt
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- interrupts: device interrupt
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Optional properties:
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Optional properties:
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- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD
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- {dtr,dsr,rng,dcd}-gpios: specify a GPIO for DTR/DSR/RI/DCD
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line respectively.
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line respectively.
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Example:
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Example:
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@ -16,4 +16,8 @@ serial@b00260000 {
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reg = <0xb0026000 0x1000>;
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reg = <0xb0026000 0x1000>;
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interrupts = <68>;
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interrupts = <68>;
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status = "disabled";
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status = "disabled";
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dtr-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
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rng-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&sysgpio 3 GPIO_ACTIVE_LOW>;
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};
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};
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@ -1067,6 +1067,7 @@ config SERIAL_ETRAXFS
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bool "ETRAX FS serial port support"
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bool "ETRAX FS serial port support"
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depends on ETRAX_ARCH_V32 && OF
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depends on ETRAX_ARCH_V32 && OF
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select SERIAL_CORE
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select SERIAL_CORE
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select SERIAL_MCTRL_GPIO if GPIOLIB
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config SERIAL_ETRAXFS_CONSOLE
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config SERIAL_ETRAXFS_CONSOLE
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bool "ETRAX FS serial console support"
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bool "ETRAX FS serial console support"
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@ -10,6 +10,8 @@
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#include <linux/of_address.h>
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#include <linux/of_address.h>
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#include <hwregs/ser_defs.h>
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#include <hwregs/ser_defs.h>
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#include "serial_mctrl_gpio.h"
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#define DRV_NAME "etraxfs-uart"
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#define DRV_NAME "etraxfs-uart"
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#define UART_NR CONFIG_ETRAX_SERIAL_PORTS
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#define UART_NR CONFIG_ETRAX_SERIAL_PORTS
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@ -28,10 +30,7 @@ struct uart_cris_port {
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void __iomem *regi_ser;
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void __iomem *regi_ser;
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struct gpio_desc *dtr_pin;
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struct mctrl_gpios *gpios;
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struct gpio_desc *dsr_pin;
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struct gpio_desc *ri_pin;
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struct gpio_desc *cd_pin;
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int write_ongoing;
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int write_ongoing;
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};
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};
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@ -389,21 +388,9 @@ static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
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ret = 0;
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ret = 0;
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if (crisv32_serial_get_rts(up))
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if (crisv32_serial_get_rts(up))
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ret |= TIOCM_RTS;
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ret |= TIOCM_RTS;
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/* DTR is active low */
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if (up->dtr_pin && !gpiod_get_raw_value(up->dtr_pin))
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ret |= TIOCM_DTR;
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/* CD is active low */
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if (up->cd_pin && !gpiod_get_raw_value(up->cd_pin))
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ret |= TIOCM_CD;
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/* RI is active low */
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if (up->ri_pin && !gpiod_get_raw_value(up->ri_pin))
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ret |= TIOCM_RI;
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/* DSR is active low */
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if (up->dsr_pin && !gpiod_get_raw_value(up->dsr_pin))
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ret |= TIOCM_DSR;
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if (crisv32_serial_get_cts(up))
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if (crisv32_serial_get_cts(up))
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ret |= TIOCM_CTS;
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ret |= TIOCM_CTS;
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return ret;
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return mctrl_gpio_get(up->gpios, &ret);
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}
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}
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static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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@ -411,15 +398,7 @@ static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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struct uart_cris_port *up = (struct uart_cris_port *)port;
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crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
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crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
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/* DTR is active low */
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mctrl_gpio_set(up->gpios, mctrl);
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if (up->dtr_pin)
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gpiod_set_raw_value(up->dtr_pin, mctrl & TIOCM_DTR ? 0 : 1);
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/* RI is active low */
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if (up->ri_pin)
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gpiod_set_raw_value(up->ri_pin, mctrl & TIOCM_RNG ? 0 : 1);
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/* CD is active low */
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if (up->cd_pin)
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gpiod_set_raw_value(up->cd_pin, mctrl & TIOCM_CD ? 0 : 1);
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}
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}
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static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
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static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
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@ -913,11 +892,12 @@ static int etraxfs_uart_probe(struct platform_device *pdev)
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up->irq = irq_of_parse_and_map(np, 0);
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up->irq = irq_of_parse_and_map(np, 0);
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up->regi_ser = of_iomap(np, 0);
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up->regi_ser = of_iomap(np, 0);
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up->dtr_pin = devm_gpiod_get_optional(&pdev->dev, "dtr");
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up->dsr_pin = devm_gpiod_get_optional(&pdev->dev, "dsr");
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up->ri_pin = devm_gpiod_get_optional(&pdev->dev, "ri");
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up->cd_pin = devm_gpiod_get_optional(&pdev->dev, "cd");
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up->port.dev = &pdev->dev;
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up->port.dev = &pdev->dev;
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up->gpios = mctrl_gpio_init(&pdev->dev, 0);
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if (IS_ERR(up->gpios))
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return PTR_ERR(up->gpios);
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cris_serial_port_init(&up->port, dev_id);
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cris_serial_port_init(&up->port, dev_id);
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etraxfs_uart_ports[dev_id] = up;
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etraxfs_uart_ports[dev_id] = up;
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