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staging: gasket: page table: remove extraneous memory barriers
Some explicit memory barriers in the page table code are not necessary, either because: (a) The barrier follows a non-relaxed MMIO access that already performs a read or write memory barrier. (b) The barrier follows DMA API calls for which the device-visible effects of IOMMU programming are guaranteed to be flushed to the IOMMU prior to the call returning, and doesn't need to sync with normal memory access. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -317,8 +317,6 @@ static void gasket_free_extended_subtable(struct gasket_page_table *pg_tbl,
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/* Release the page table from the device */
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writeq(0, slot);
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/* Force sync around the address release. */
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mb();
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if (pte->dma_addr)
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dma_unmap_page(pg_tbl->device, pte->dma_addr, PAGE_SIZE,
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@ -504,8 +502,6 @@ static int gasket_perform_mapping(struct gasket_page_table *pg_tbl,
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(void *)page_to_phys(page));
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return -1;
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}
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/* Wait until the page is mapped. */
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mb();
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}
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/* Make the DMA-space address available to the device. */
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@ -604,12 +600,13 @@ static void gasket_perform_unmapping(struct gasket_page_table *pg_tbl,
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*/
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for (i = 0; i < num_pages; i++) {
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/* release the address from the device, */
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if (is_simple_mapping || ptes[i].status == PTE_INUSE)
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if (is_simple_mapping || ptes[i].status == PTE_INUSE) {
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writeq(0, &slots[i]);
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else
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} else {
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((u64 __force *)slots)[i] = 0;
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/* Force sync around the address release. */
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mb();
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/* sync above PTE update before updating mappings */
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wmb();
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}
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/* release the address from the driver, */
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if (ptes[i].status == PTE_INUSE) {
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@ -898,8 +895,6 @@ static int gasket_alloc_extended_subtable(struct gasket_page_table *pg_tbl,
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/* Map the page into DMA space. */
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pte->dma_addr = dma_map_page(pg_tbl->device, pte->page, 0, PAGE_SIZE,
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DMA_BIDIRECTIONAL);
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/* Wait until the page is mapped. */
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mb();
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/* make the addresses available to the device */
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dma_addr = (pte->dma_addr + pte->offset) | GASKET_VALID_SLOT_FLAG;
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