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tx4938ide: Avoid underflow on calculation of a wait cycle
Make 'wt' variable signed while it can be negative during calculation. Suggested-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: sshtylyov@ru.mvista.com Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -26,12 +26,13 @@ static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
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unsigned int sp = (cr >> 4) & 3;
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unsigned int clock = gbus_clock / (4 - sp);
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unsigned int cycle = 1000000000 / clock;
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unsigned int wt, shwt;
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unsigned int shwt;
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int wt;
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/* Minimum DIOx- active time */
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wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
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/* IORDY setup time: 35ns */
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wt = max(wt, DIV_ROUND_UP(35, cycle));
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wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
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/* actual wait-cycle is max(wt & ~1, 1) */
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if (wt > 2 && (wt & 1))
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wt++;
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