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clk: bcm2835: Protect sections updating shared registers
CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock
handlers and must be accessed with ->regs_lock held.
Update the sections where this protection is missing.
Fixes: 41691b8862
("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -623,8 +623,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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~A2W_PLL_CTRL_PWRDN);
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/* Take the PLL out of reset. */
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spin_lock(&cprman->regs_lock);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);
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spin_unlock(&cprman->regs_lock);
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/* Wait for the PLL to lock. */
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timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
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@ -701,9 +703,11 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
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}
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/* Unmask the reference clock from the oscillator. */
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spin_lock(&cprman->regs_lock);
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cprman_write(cprman, A2W_XOSC_CTRL,
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cprman_read(cprman, A2W_XOSC_CTRL) |
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data->reference_enable_mask);
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spin_unlock(&cprman->regs_lock);
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if (do_ana_setup_first)
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bcm2835_pll_write_ana(cprman, data->ana_reg_base, ana);
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