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ARCv2: SLC: Allow boot time disable

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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta 2015-06-04 18:30:23 +05:30
parent f2b0b25a37
commit 79335a2ca0
1 changed files with 19 additions and 2 deletions
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21
arch/arc/mm/cache.c
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@ -23,6 +23,7 @@
static int l2_line_sz; static int l2_line_sz;
int ioc_exists; int ioc_exists;
volatile int slc_enable = 1;
void (*_cache_line_loop_ic_fn)(unsigned long paddr, unsigned long vaddr, void (*_cache_line_loop_ic_fn)(unsigned long paddr, unsigned long vaddr,
unsigned long sz, const int cacheop); unsigned long sz, const int cacheop);
@ -36,6 +37,7 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
int n = 0; int n = 0;
struct cpuinfo_arc_cache *p; struct cpuinfo_arc_cache *p;
#define IS_USED_RUN(v) ((v) ? "" : "(disabled) ")
#define PR_CACHE(p, cfg, str) \ #define PR_CACHE(p, cfg, str) \
if (!(p)->ver) \ if (!(p)->ver) \
n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \ n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \
@ -53,7 +55,8 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
p = &cpuinfo_arc700[c].slc; p = &cpuinfo_arc700[c].slc;
if (p->ver) if (p->ver)
n += scnprintf(buf + n, len - n, n += scnprintf(buf + n, len - n,
"SLC\t\t: %uK, %uB Line\n", p->sz_k, p->line_len); "SLC\t\t: %uK, %uB Line%s\n",
p->sz_k, p->line_len, IS_USED_RUN(slc_enable));
if (ioc_exists) if (ioc_exists)
n += scnprintf(buf + n, len - n, "IOC\t\t: exists\n"); n += scnprintf(buf + n, len - n, "IOC\t\t: exists\n");
@ -908,6 +911,20 @@ void arc_cache_init(void)
} }
} }
if (is_isa_arcv2() && l2_line_sz && !slc_enable) {
/* IM set : flush before invalidate */
write_aux_reg(ARC_REG_SLC_CTRL,
read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_IM);
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
write_aux_reg(ARC_REG_SLC_CTRL,
read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_DISABLE);
}
if (is_isa_arcv2() && ioc_exists) { if (is_isa_arcv2() && ioc_exists) {
/* IO coherency base - 0x8z */ /* IO coherency base - 0x8z */
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000); write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
@ -921,7 +938,7 @@ void arc_cache_init(void)
__dma_cache_wback_inv = __dma_cache_wback_inv_ioc; __dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
__dma_cache_inv = __dma_cache_inv_ioc; __dma_cache_inv = __dma_cache_inv_ioc;
__dma_cache_wback = __dma_cache_wback_ioc; __dma_cache_wback = __dma_cache_wback_ioc;
} else if (is_isa_arcv2() && l2_line_sz) { } else if (is_isa_arcv2() && l2_line_sz && slc_enable) {
__dma_cache_wback_inv = __dma_cache_wback_inv_slc; __dma_cache_wback_inv = __dma_cache_wback_inv_slc;
__dma_cache_inv = __dma_cache_inv_slc; __dma_cache_inv = __dma_cache_inv_slc;
__dma_cache_wback = __dma_cache_wback_slc; __dma_cache_wback = __dma_cache_wback_slc;