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drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2016-06-03 14:31:46 -04:00 committed by Alex Deucher
parent dad4acc896
commit 78f73bf03c
2 changed files with 6 additions and 4 deletions

View File

@ -5292,9 +5292,9 @@ static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *ade
temp = data = RREG32(mmRLC_PG_CNTL);
/* Enable quick PG */
if (enable)
data |= 0x100000;
data |= RLC_PG_CNTL__QUICK_PG_ENABLE_MASK;
else
data &= ~0x100000;
data &= ~RLC_PG_CNTL__QUICK_PG_ENABLE_MASK;
if (temp != data)
WREG32(mmRLC_PG_CNTL, data);

View File

@ -8764,8 +8764,10 @@
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE__SHIFT 0x12
#define RLC_PG_CNTL__SMU_HANDSHAKE_ENABLE_MASK 0x80000
#define RLC_PG_CNTL__SMU_HANDSHAKE_ENABLE__SHIFT 0x13
#define RLC_PG_CNTL__RESERVED1_MASK 0xf00000
#define RLC_PG_CNTL__RESERVED1__SHIFT 0x14
#define RLC_PG_CNTL__QUICK_PG_ENABLE_MASK 0x100000
#define RLC_PG_CNTL__QUICK_PG_ENABLE__SHIFT 0x14
#define RLC_PG_CNTL__RESERVED1_MASK 0xe00000
#define RLC_PG_CNTL__RESERVED1__SHIFT 0x15
#define RLC_GPM_THREAD_PRIORITY__THREAD0_PRIORITY_MASK 0xff
#define RLC_GPM_THREAD_PRIORITY__THREAD0_PRIORITY__SHIFT 0x0
#define RLC_GPM_THREAD_PRIORITY__THREAD1_PRIORITY_MASK 0xff00