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MIPS: Malta: Enable magic multipliers for Super I/O UARTs

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The SMSC FDC37M817 Super I/O chip has a configuration feature that lets
it support special UART divisor values of 32770 and 32769 for bit rates
of 230400 and 460800 bits per second respectively.  Our 8250 driver core
provides support for these special divisors via the UPF_MAGIC_MULTIPLIER
flag, and YAMON firmware unconditionally configures the Super I/O chip
with these divisors enabled as well, so all we need to do in platform
setup for these bit rates to work is to set the flag.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2105182249380.3032@angie.orcam.me.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Maciej W. Rozycki 2021-06-10 20:38:48 +02:00 committed by Greg Kroah-Hartman
parent f7adc73878
commit 7888478398
1 changed files with 2 additions and 1 deletions
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3
arch/mips/mti-malta/malta-platform.c
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@ -33,7 +33,8 @@
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | \
UPF_MAGIC_MULTIPLIER, \
.regshift = 0, \
}