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bnxt_en: Add bnxt_en initial port params table and register it
Register devlink_port with devlink and create initial port params table for bnxt_en. The table consists of a generic parameter: wake_on_lan: Enables Wake on Lan for this port when magic packet is received with this port's MAC address using ACPI pattern. If enabled, the controller asserts a wake pin upon reception of WoL packet. ACPI (Advanced Configuration and Power Interface) is an industry specification for the efficient handling of power consumption in desktop and mobile computers. v2->v3: - Modify bnxt_dl_wol_validate(), to throw error message when user gives value other than DEVLINK_PARAM_WAKE_MAGIC ot to disable WOL. - Use netdev_err() instead of netdev_warn(), when devlink_port_register() and devlink_port_params_register() returns error. Also, don't log rc in this message. Cc: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1609,6 +1609,7 @@ struct bnxt {
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/* devlink interface and vf-rep structs */
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struct devlink *dl;
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struct devlink_port dl_port;
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enum devlink_eswitch_mode eswitch_mode;
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struct bnxt_vf_rep **vf_reps; /* array of vf-rep ptrs */
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u16 *cfa_code_map; /* cfa_code -> vf_idx map */
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@ -37,6 +37,8 @@ static const struct bnxt_dl_nvm_param nvm_params[] = {
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NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7},
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{BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK,
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BNXT_NVM_SHARED_CFG, 1},
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{DEVLINK_PARAM_GENERIC_ID_WOL, NVM_OFF_WOL, BNXT_NVM_PORT_CFG, 1},
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};
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static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
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@ -70,7 +72,8 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
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bytesize = roundup(nvm_param.num_bits, BITS_PER_BYTE) / BITS_PER_BYTE;
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switch (bytesize) {
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case 1:
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if (nvm_param.num_bits == 1)
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if (nvm_param.num_bits == 1 &&
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nvm_param.id != DEVLINK_PARAM_GENERIC_ID_WOL)
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buf = &val->vbool;
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else
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buf = &val->vu8;
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@ -164,6 +167,17 @@ static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
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return 0;
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}
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static int bnxt_dl_wol_validate(struct devlink *dl, u32 id,
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union devlink_param_value val,
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struct netlink_ext_ack *extack)
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{
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if (val.vu8 && val.vu8 != DEVLINK_PARAM_WAKE_MAGIC) {
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NL_SET_ERR_MSG_MOD(extack, "WOL type is not supported");
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return -EINVAL;
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}
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return 0;
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}
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static const struct devlink_param bnxt_dl_params[] = {
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DEVLINK_PARAM_GENERIC(ENABLE_SRIOV,
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BIT(DEVLINK_PARAM_CMODE_PERMANENT),
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@ -188,6 +202,12 @@ static const struct devlink_param bnxt_dl_params[] = {
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NULL),
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};
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static const struct devlink_param bnxt_dl_port_params[] = {
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DEVLINK_PARAM_GENERIC(WOL, BIT(DEVLINK_PARAM_CMODE_PERMANENT),
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bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
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bnxt_dl_wol_validate),
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};
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int bnxt_dl_register(struct bnxt *bp)
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{
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struct devlink *dl;
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@ -225,8 +245,26 @@ int bnxt_dl_register(struct bnxt *bp)
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goto err_dl_unreg;
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}
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rc = devlink_port_register(dl, &bp->dl_port, bp->pf.port_id);
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if (rc) {
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netdev_err(bp->dev, "devlink_port_register failed");
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goto err_dl_param_unreg;
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}
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devlink_port_type_eth_set(&bp->dl_port, bp->dev);
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rc = devlink_port_params_register(&bp->dl_port, bnxt_dl_port_params,
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ARRAY_SIZE(bnxt_dl_port_params));
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if (rc) {
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netdev_err(bp->dev, "devlink_port_params_register failed");
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goto err_dl_port_unreg;
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}
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return 0;
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err_dl_port_unreg:
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devlink_port_unregister(&bp->dl_port);
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err_dl_param_unreg:
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devlink_params_unregister(dl, bnxt_dl_params,
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ARRAY_SIZE(bnxt_dl_params));
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err_dl_unreg:
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devlink_unregister(dl);
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err_dl_free:
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@ -242,6 +280,9 @@ void bnxt_dl_unregister(struct bnxt *bp)
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if (!dl)
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return;
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devlink_port_params_unregister(&bp->dl_port, bnxt_dl_port_params,
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ARRAY_SIZE(bnxt_dl_port_params));
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devlink_port_unregister(&bp->dl_port);
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devlink_params_unregister(dl, bnxt_dl_params,
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ARRAY_SIZE(bnxt_dl_params));
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devlink_unregister(dl);
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@ -35,6 +35,7 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl)
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#define NVM_OFF_MSIX_VEC_PER_PF_MAX 108
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#define NVM_OFF_MSIX_VEC_PER_PF_MIN 114
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#define NVM_OFF_WOL 152
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#define NVM_OFF_IGNORE_ARI 164
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#define NVM_OFF_DIS_GRE_VER_CHECK 171
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#define NVM_OFF_ENABLE_SRIOV 401
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