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s390/bpf: Adjust ALU64_DIV/MOD to match interpreter change
The s390x ALU64_DIV/MOD has been implemented according to the eBPF interpreter specification that used do_div(). This function does a 64-bit by 32-bit divide. It turned out that this was wrong and now the interpreter uses div64_u64_rem() for full 64-bit division. So fix this and use full 64-bit division in the s390x eBPF backend code. Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -588,8 +588,8 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
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EMIT4(0xb9160000, dst_reg, rc_reg);
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break;
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}
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case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / (u32) src */
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case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % (u32) src */
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case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */
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case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */
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{
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int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
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@ -602,10 +602,8 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
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EMIT4_IMM(0xa7090000, REG_W0, 0);
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/* lgr %w1,%dst */
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EMIT4(0xb9040000, REG_W1, dst_reg);
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/* llgfr %dst,%src (u32 cast) */
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EMIT4(0xb9160000, dst_reg, src_reg);
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/* dlgr %w0,%dst */
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EMIT4(0xb9870000, REG_W0, dst_reg);
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EMIT4(0xb9870000, REG_W0, src_reg);
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/* lgr %dst,%rc */
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EMIT4(0xb9040000, dst_reg, rc_reg);
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break;
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@ -632,8 +630,8 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
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EMIT4(0xb9160000, dst_reg, rc_reg);
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break;
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}
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case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / (u32) imm */
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case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % (u32) imm */
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case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */
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case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */
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{
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int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
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@ -649,7 +647,7 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
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EMIT4(0xb9040000, REG_W1, dst_reg);
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/* dlg %w0,<d(imm)>(%l) */
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EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
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EMIT_CONST_U64((u32) imm));
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EMIT_CONST_U64(imm));
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/* lgr %dst,%rc */
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EMIT4(0xb9040000, dst_reg, rc_reg);
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break;
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