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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

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This commit is contained in:
Paul Mundt 2009-12-21 11:59:55 +09:00
commit 76e7461a21
737 changed files with 34999 additions and 9349 deletions
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7
.gitignore vendored
View File

@ -22,6 +22,7 @@
*.lst
*.symtypes
*.order
modules.builtin
*.elf
*.bin
*.gz
@ -45,14 +46,8 @@ Module.symvers
#
# Generated include files
#
include/asm
include/asm-*/asm-offsets.h
include/config
include/linux/autoconf.h
include/linux/compile.h
include/linux/version.h
include/linux/utsrelease.h
include/linux/bounds.h
include/generated
# stgit generated dirs

49
Documentation/cpu-hotplug.txt
View File

@ -315,41 +315,26 @@ A: The following are what is required for CPU hotplug infrastructure to work
Q: I need to ensure that a particular cpu is not removed when there is some
work specific to this cpu is in progress.
A: First switch the current thread context to preferred cpu
A: There are two ways. If your code can be run in interrupt context, use
smp_call_function_single(), otherwise use work_on_cpu(). Note that
work_on_cpu() is slow, and can fail due to out of memory:
int my_func_on_cpu(int cpu)
{
cpumask_t saved_mask, new_mask = CPU_MASK_NONE;
int curr_cpu, err = 0;
saved_mask = current->cpus_allowed;
cpu_set(cpu, new_mask);
err = set_cpus_allowed(current, new_mask);
if (err)
return err;
/*
* If we got scheduled out just after the return from
* set_cpus_allowed() before running the work, this ensures
* we stay locked.
*/
curr_cpu = get_cpu();
if (curr_cpu != cpu) {
err = -EAGAIN;
goto ret;
} else {
/*
* Do work : But cant sleep, since get_cpu() disables preempt
*/
}
ret:
put_cpu();
set_cpus_allowed(current, saved_mask);
return err;
}
int err;
get_online_cpus();
if (!cpu_online(cpu))
err = -EINVAL;
else
#if NEEDS_BLOCKING
err = work_on_cpu(cpu, __my_func_on_cpu, NULL);
#else
smp_call_function_single(cpu, __my_func_on_cpu, &err,
true);
#endif
put_online_cpus();
return err;
}
Q: How do we determine how many CPUs are available for hotplug.
A: There is no clear spec defined way from ACPI that can give us that

1
Documentation/dontdiff
View File

@ -103,6 +103,7 @@ gconf
gen-devlist
gen_crc32table
gen_init_cpio
generated
genheaders
genksyms
*_gray256.c

60
Documentation/hwmon/k10temp Normal file
View File

@ -0,0 +1,60 @@
Kernel driver k10temp
=====================
Supported chips:
* AMD Family 10h processors:
Socket F: Quad-Core/Six-Core/Embedded Opteron
Socket AM2+: Opteron, Phenom (II) X3/X4
Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
Socket S1G3: Athlon II, Sempron, Turion II
* AMD Family 11h processors:
Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra)
Prefix: 'k10temp'
Addresses scanned: PCI space
Datasheets:
BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors:
http://support.amd.com/us/Processor_TechDocs/31116.pdf
BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
http://support.amd.com/us/Processor_TechDocs/41256.pdf
Revision Guide for AMD Family 10h Processors:
http://support.amd.com/us/Processor_TechDocs/41322.pdf
Revision Guide for AMD Family 11h Processors:
http://support.amd.com/us/Processor_TechDocs/41788.pdf
AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks:
http://support.amd.com/us/Processor_TechDocs/43373.pdf
AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet:
http://support.amd.com/us/Processor_TechDocs/43374.pdf
AMD Family 10h Desktop Processor Power and Thermal Data Sheet:
http://support.amd.com/us/Processor_TechDocs/43375.pdf
Author: Clemens Ladisch <clemens@ladisch.de>
Description
-----------
This driver permits reading of the internal temperature sensor of AMD
Family 10h and 11h processors.
All these processors have a sensor, but on older revisions of Family 10h
processors, the sensor may return inconsistent values (erratum 319). The
driver will refuse to load on these revisions unless you specify the
"force=1" module parameter.
There is one temperature measurement value, available as temp1_input in
sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree.
Please note that it is defined as a relative value; to quote the AMD manual:
Tctl is the processor temperature control value, used by the platform to
control cooling systems. Tctl is a non-physical temperature on an
arbitrary scale measured in degrees. It does _not_ represent an actual
physical temperature like die or case temperature. Instead, it specifies
the processor temperature relative to the point at which the system must
supply the maximum cooling for the processor's specified maximum case
temperature and maximum thermal power dissipation.
The maximum value for Tctl is available in the file temp1_max.
If the BIOS has enabled hardware temperature control, the threshold at
which the processor will throttle itself to avoid damage is available in
temp1_crit and temp1_crit_hyst.

14
Documentation/kbuild/kbuild.txt
View File

@ -1,3 +1,17 @@
Output files
modules.order
--------------------------------------------------
This file records the order in which modules appear in Makefiles. This
is used by modprobe to deterministically resolve aliases that match
multiple modules.
modules.builtin
--------------------------------------------------
This file lists all modules that are built into the kernel. This is used
by modprobe to not fail when trying to load something builtin.
Environment variables
KCPPFLAGS

8
Documentation/kbuild/kconfig.txt
View File

@ -103,10 +103,16 @@ KCONFIG_AUTOCONFIG
This environment variable can be set to specify the path & name of the
"auto.conf" file. Its default value is "include/config/auto.conf".
KCONFIG_TRISTATE
--------------------------------------------------
This environment variable can be set to specify the path & name of the
"tristate.conf" file. Its default value is "include/config/tristate.conf".
KCONFIG_AUTOHEADER
--------------------------------------------------
This environment variable can be set to specify the path & name of the
"autoconf.h" (header) file. Its default value is "include/linux/autoconf.h".
"autoconf.h" (header) file.
Its default value is "include/generated/autoconf.h".
======================================================================

4
Kbuild
View File

@ -8,7 +8,7 @@
#####
# 1) Generate bounds.h
bounds-file := include/linux/bounds.h
bounds-file := include/generated/bounds.h
always := $(bounds-file)
targets := $(bounds-file) kernel/bounds.s
@ -43,7 +43,7 @@ $(obj)/$(bounds-file): kernel/bounds.s Kbuild
# 2) Generate asm-offsets.h
#
offsets-file := include/asm/asm-offsets.h
offsets-file := include/generated/asm-offsets.h
always += $(offsets-file)
targets += $(offsets-file)

6
MAINTAINERS
View File

@ -5434,6 +5434,12 @@ F: drivers/uwb/*
F: include/linux/uwb.h
F: include/linux/uwb/
UNIFDEF
M: Tony Finch <dot@dotat.at>
W: http://dotat.at/prog/unifdef
S: Maintained
F: scripts/unifdef.c
UNIFORM CDROM DRIVER
M: Jens Axboe <axboe@kernel.dk>
W: http://www.kernel.dk

107
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 32
EXTRAVERSION =
SUBLEVEL = 33
EXTRAVERSION = -rc1
NAME = Man-Eating Seals of Antiquity
# *DOCUMENTATION*
@ -16,6 +16,13 @@ NAME = Man-Eating Seals of Antiquity
# o print "Entering directory ...";
MAKEFLAGS += -rR --no-print-directory
# Avoid funny character set dependencies
unexport LC_ALL
LC_CTYPE=C
LC_COLLATE=C
LC_NUMERIC=C
export LC_CTYPE LC_COLLATE LC_NUMERIC
# We are using a recursive build, so we need to do a little thinking
# to get the ordering right.
#
@ -334,10 +341,9 @@ CFLAGS_GCOV = -fprofile-arcs -ftest-coverage
# Use LINUXINCLUDE when you must reference the include/ directory.
# Needed to be compatible with the O= option
LINUXINCLUDE := -Iinclude \
$(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \
-I$(srctree)/arch/$(hdr-arch)/include \
-include include/linux/autoconf.h
LINUXINCLUDE := -I$(srctree)/arch/$(hdr-arch)/include -Iinclude \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
-include include/generated/autoconf.h
KBUILD_CPPFLAGS := -D__KERNEL__
@ -465,7 +471,7 @@ ifeq ($(KBUILD_EXTMOD),)
# Carefully list dependencies so we do not try to build scripts twice
# in parallel
PHONY += scripts
scripts: scripts_basic include/config/auto.conf
scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
$(Q)$(MAKE) $(build)=$(@)
# Objects we will link into vmlinux / subdirs we need to visit
@ -492,18 +498,18 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# with it and forgot to run make oldconfig.
# if auto.conf.cmd is missing then we are probably in a cleaned tree so
# we execute the config step to be sure to catch updated Kconfig files
include/config/auto.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
else
# external modules needs include/linux/autoconf.h and include/config/auto.conf
# external modules needs include/generated/autoconf.h and include/config/auto.conf
# but do not care if they are up-to-date. Use auto.conf to trigger the test
PHONY += include/config/auto.conf
include/config/auto.conf:
$(Q)test -e include/linux/autoconf.h -a -e $@ || ( \
$(Q)test -e include/generated/autoconf.h -a -e $@ || ( \
echo; \
echo " ERROR: Kernel configuration is invalid."; \
echo " include/linux/autoconf.h or $@ are missing."; \
echo " include/generated/autoconf.h or $@ are missing.";\
echo " Run 'make oldconfig && make prepare' on kernel src to fix it."; \
echo; \
/bin/false)
@ -877,6 +883,9 @@ $(sort $(vmlinux-init) $(vmlinux-main)) $(vmlinux-lds): $(vmlinux-dirs) ;
PHONY += $(vmlinux-dirs)
$(vmlinux-dirs): prepare scripts
$(Q)$(MAKE) $(build)=$@
ifdef CONFIG_MODULES
$(Q)$(MAKE) $(modbuiltin)=$@
endif
# Build the kernel release string
#
@ -955,7 +964,6 @@ PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3
# prepare3 is used to check if we are building in a separate output directory,
# and if so do:
# 1) Check that make has not been executed in the kernel src $(srctree)
# 2) Create the include2 directory, used for the second asm symlink
prepare3: include/config/kernel.release
ifneq ($(KBUILD_SRC),)
@$(kecho) ' Using $(srctree) as source for kernel'
@ -964,17 +972,13 @@ ifneq ($(KBUILD_SRC),)
echo " in the '$(srctree)' directory.";\
/bin/false; \
fi;
$(Q)if [ ! -d include2 ]; then \
mkdir -p include2; \
ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm; \
fi
endif
# prepare2 creates a makefile if using a separate output directory
prepare2: prepare3 outputmakefile
prepare1: prepare2 include/linux/version.h include/linux/utsrelease.h \
include/asm include/config/auto.conf
prepare1: prepare2 include/linux/version.h include/generated/utsrelease.h \
include/config/auto.conf
$(cmd_crmodverdir)
archprepare: prepare1 scripts_basic
@ -986,42 +990,6 @@ prepare0: archprepare FORCE
# All the preparing..
prepare: prepare0
# The asm symlink changes when $(ARCH) changes.
# Detect this and ask user to run make mrproper
# If asm is a stale symlink (point to dir that does not exist) remove it
define check-symlink
set -e; \
if [ -L include/asm ]; then \
asmlink=`readlink include/asm | cut -d '-' -f 2`; \
if [ "$$asmlink" != "$(SRCARCH)" ]; then \
echo "ERROR: the symlink $@ points to asm-$$asmlink but asm-$(SRCARCH) was expected"; \
echo " set ARCH or save .config and run 'make mrproper' to fix it"; \
exit 1; \
fi; \
test -e $$asmlink || rm include/asm; \
elif [ -d include/asm ]; then \
echo "ERROR: $@ is a directory but a symlink was expected";\
exit 1; \
fi
endef
# We create the target directory of the symlink if it does
# not exist so the test in check-symlink works and we have a
# directory for generated filesas used by some architectures.
define create-symlink
if [ ! -L include/asm ]; then \
$(kecho) ' SYMLINK $@ -> include/asm-$(SRCARCH)'; \
if [ ! -d include/asm-$(SRCARCH) ]; then \
mkdir -p include/asm-$(SRCARCH); \
fi; \
ln -fsn asm-$(SRCARCH) $@; \
fi
endef
include/asm: FORCE
$(Q)$(check-symlink)
$(Q)$(create-symlink)
# Generate some files
# ---------------------------------------------------------------------------
@ -1046,7 +1014,7 @@ endef
include/linux/version.h: $(srctree)/Makefile FORCE
$(call filechk,version.h)
include/linux/utsrelease.h: include/config/kernel.release FORCE
include/generated/utsrelease.h: include/config/kernel.release FORCE
$(call filechk,utsrelease.h)
PHONY += headerdep
@ -1076,11 +1044,6 @@ firmware_install: FORCE
export INSTALL_HDR_PATH = $(objtree)/usr
hdr-inst := -rR -f $(srctree)/scripts/Makefile.headersinst obj
# Find out where the Kbuild file is located to support
# arch/$(ARCH)/include/asm
hdr-dir = $(strip \
$(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/asm/Kbuild), \
arch/$(hdr-arch)/include/asm, include/asm-$(hdr-arch)))
# If we do an all arch process set dst to asm-$(hdr-arch)
hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm)
@ -1095,10 +1058,10 @@ headers_install_all:
PHONY += headers_install
headers_install: __headers
$(if $(wildcard $(srctree)/$(hdr-dir)/Kbuild),, \
$(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/asm/Kbuild),, \
$(error Headers not exportable for the $(SRCARCH) architecture))
$(Q)$(MAKE) $(hdr-inst)=include
$(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst)
$(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/asm $(hdr-dst)
PHONY += headers_check_all
headers_check_all: headers_install_all
@ -1107,7 +1070,7 @@ headers_check_all: headers_install_all
PHONY += headers_check
headers_check: headers_install
$(Q)$(MAKE) $(hdr-inst)=include HDRCHECK=1
$(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst) HDRCHECK=1
$(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/asm $(hdr-dst) HDRCHECK=1
# ---------------------------------------------------------------------------
# Modules
@ -1127,6 +1090,7 @@ all: modules
PHONY += modules
modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux)
$(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order
$(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.builtin) > $(objtree)/modules.builtin
@$(kecho) ' Building modules, stage 2.';
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild
@ -1156,6 +1120,7 @@ _modinst_:
ln -s $(objtree) $(MODLIB)/build ; \
fi
@cp -f $(objtree)/modules.order $(MODLIB)/
@cp -f $(objtree)/modules.builtin $(MODLIB)/
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst
# This depmod is only for convenience to give the initial
@ -1194,12 +1159,10 @@ CLEAN_FILES += vmlinux System.map \
.tmp_kallsyms* .tmp_version .tmp_vmlinux* .tmp_System.map
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include2 usr/include include/generated
MRPROPER_FILES += .config .config.old include/asm .version .old_version \
include/linux/autoconf.h include/linux/version.h \
include/linux/utsrelease.h \
include/linux/bounds.h include/asm*/asm-offsets.h \
Module.symvers Module.markers tags TAGS cscope*
MRPROPER_DIRS += include/config usr/include include/generated
MRPROPER_FILES += .config .config.old .version .old_version \
include/linux/version.h \
Module.symvers tags TAGS cscope*
# clean - Delete most, but leave enough to build external modules
#
@ -1218,7 +1181,7 @@ clean: archclean $(clean-dirs)
\( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name 'Module.markers' -o -name '.tmp_*.o.*' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name '*.gcno' \) -type f -print | xargs rm -f
# mrproper - Delete all generated files, including .config
@ -1416,8 +1379,8 @@ $(clean-dirs):
clean: rm-dirs := $(MODVERDIR)
clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \
$(KBUILD_EXTMOD)/Module.markers \
$(KBUILD_EXTMOD)/modules.order
$(KBUILD_EXTMOD)/modules.order \
$(KBUILD_EXTMOD)/modules.builtin
clean: $(clean-dirs)
$(call cmd,rmdirs)
$(call cmd,rmfiles)

4
arch/Kconfig
View File

@ -135,9 +135,7 @@ config HAVE_DEFAULT_NO_SPIN_MUTEXES
config HAVE_HW_BREAKPOINT
bool
depends on HAVE_PERF_EVENTS
select ANON_INODES
select PERF_EVENTS
depends on PERF_EVENTS
config HAVE_USER_RETURN_NOTIFIER
bool

1
arch/alpha/Kconfig
View File

@ -9,6 +9,7 @@ config ALPHA
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_SYSCALL_WRAPPERS
select HAVE_PERF_EVENTS
help
The Alpha is a 64-bit general-purpose processor designed and
marketed by the Digital Equipment Corporation of blessed memory,

2
arch/alpha/boot/bootp.c
View File

@ -9,7 +9,7 @@
*/
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/utsrelease.h>
#include <generated/utsrelease.h>
#include <linux/mm.h>
#include <asm/system.h>

2
arch/alpha/boot/bootpz.c
View File

@ -11,7 +11,7 @@
*/
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/utsrelease.h>
#include <generated/utsrelease.h>
#include <linux/mm.h>
#include <asm/system.h>

2
arch/alpha/boot/main.c
View File

@ -7,7 +7,7 @@
*/
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/utsrelease.h>
#include <generated/utsrelease.h>
#include <linux/mm.h>
#include <asm/system.h>

1
arch/alpha/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

3
arch/alpha/include/asm/bug.h
View File

@ -13,7 +13,8 @@
"call_pal %0 # bugchk\n\t" \
".long %1\n\t.8byte %2" \
: : "i"(PAL_bugchk), "i"(__LINE__), "i"(__FILE__)); \
for ( ; ; ); } while (0)
unreachable(); \
} while (0)
#define HAVE_ARCH_BUG
#endif

2
arch/alpha/include/asm/fcntl.h
View File

@ -16,7 +16,7 @@
#define O_NOATIME 04000000
#define O_CLOEXEC 010000000 /* set close_on_exec */
/*
* Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using
* Before Linux 2.6.33 only O_DSYNC semantics were implemented, but using
* the O_SYNC flag. We continue to use the existing numerical value
* for O_DSYNC semantics now, but using the correct symbolic name for it.
* This new value is used to request true Posix O_SYNC semantics. It is

9
arch/alpha/include/asm/perf_event.h Normal file
View File

@ -0,0 +1,9 @@
#ifndef __ASM_ALPHA_PERF_EVENT_H
#define __ASM_ALPHA_PERF_EVENT_H
/* Alpha only supports software events through this interface. */
static inline void set_perf_event_pending(void) { }
#define PERF_EVENT_INDEX_OFFSET 0
#endif /* __ASM_ALPHA_PERF_EVENT_H */

17
arch/alpha/include/asm/unistd.h
View File

@ -247,6 +247,7 @@
#define __IGNORE_pause
#define __IGNORE_time
#define __IGNORE_utime
#define __IGNORE_umount2
/*
* Linux-specific system calls begin at 300
@ -434,10 +435,24 @@
#define __NR_timerfd 477
#define __NR_eventfd 478
#define __NR_recvmmsg 479
#define __NR_fallocate 480
#define __NR_timerfd_create 481
#define __NR_timerfd_settime 482
#define __NR_timerfd_gettime 483
#define __NR_signalfd4 484
#define __NR_eventfd2 485
#define __NR_epoll_create1 486
#define __NR_dup3 487
#define __NR_pipe2 488
#define __NR_inotify_init1 489
#define __NR_preadv 490
#define __NR_pwritev 491
#define __NR_rt_tgsigqueueinfo 492
#define __NR_perf_event_open 493
#ifdef __KERNEL__
#define NR_SYSCALLS 480
#define NR_SYSCALLS 494
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR

16
arch/alpha/kernel/systbls.S
View File

@ -495,9 +495,23 @@ sys_call_table:
.quad sys_epoll_pwait
.quad sys_utimensat /* 475 */
.quad sys_signalfd
.quad sys_ni_syscall
.quad sys_ni_syscall /* sys_timerfd */
.quad sys_eventfd
.quad sys_recvmmsg
.quad sys_fallocate /* 480 */
.quad sys_timerfd_create
.quad sys_timerfd_settime
.quad sys_timerfd_gettime
.quad sys_signalfd4
.quad sys_eventfd2 /* 485 */
.quad sys_epoll_create1
.quad sys_dup3
.quad sys_pipe2
.quad sys_inotify_init1
.quad sys_preadv /* 490 */
.quad sys_pwritev
.quad sys_rt_tgsigqueueinfo
.quad sys_perf_event_open
.size sys_call_table, . - sys_call_table
.type sys_call_table, @object

14
arch/arm/Makefile
View File

@ -242,15 +242,8 @@ all: $(KBUILD_IMAGE)
boot := arch/arm/boot
# Update machine arch and proc symlinks if something which affects
# them changed. We use .arch to indicate when they were updated
# last, otherwise make uses the target directory mtime.
archprepare: maketools
PHONY += maketools FORCE
maketools: include/linux/version.h FORCE
$(Q)$(MAKE) $(build)=arch/arm/tools include/asm-arm/mach-types.h
archprepare:
$(Q)$(MAKE) $(build)=arch/arm/tools include/generated/mach-types.h
# Convert bzImage to zImage
bzImage: zImage
@ -261,9 +254,6 @@ zImage Image xipImage bootpImage uImage: vmlinux
zinstall install: vmlinux
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
CLEAN_FILES += include/asm-arm/mach-types.h \
include/asm-arm/arch include/asm-arm/.arch
# We use MRPROPER_FILES and CLEAN_FILES now
archclean:
$(Q)$(MAKE) $(clean)=$(boot)

12
arch/arm/common/dmabounce.c
View File

@ -308,15 +308,11 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
memcpy(ptr, buf->safe, size);
/*
* DMA buffers must have the same cache properties
* as if they were really used for DMA - which means
* data must be written back to RAM. Note that
* we don't use dmac_flush_range() here for the
* bidirectional case because we know the cache
* lines will be coherent with the data written.
* Since we may have written to a page cache page,
* we need to ensure that the data will be coherent
* with user mappings.
*/
dmac_clean_range(ptr, ptr + size);
outer_clean_range(__pa(ptr), __pa(ptr) + size);
__cpuc_flush_kernel_dcache_area(ptr, size);
}
free_safe_buffer(dev->archdata.dmabounce, buf);
}

1
arch/arm/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

17
arch/arm/include/asm/cacheflush.h
View File

@ -211,7 +211,7 @@ struct cpu_cache_fns {
void (*coherent_kern_range)(unsigned long, unsigned long);
void (*coherent_user_range)(unsigned long, unsigned long);
void (*flush_kern_dcache_page)(void *);
void (*flush_kern_dcache_area)(void *, size_t);
void (*dma_inv_range)(const void *, const void *);
void (*dma_clean_range)(const void *, const void *);
@ -236,7 +236,7 @@ extern struct cpu_cache_fns cpu_cache;
#define __cpuc_flush_user_range cpu_cache.flush_user_range
#define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range
#define __cpuc_coherent_user_range cpu_cache.coherent_user_range
#define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page
#define __cpuc_flush_dcache_area cpu_cache.flush_kern_dcache_area
/*
* These are private to the dma-mapping API. Do not use directly.
@ -255,14 +255,14 @@ extern struct cpu_cache_fns cpu_cache;
#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
#define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page)
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
extern void __cpuc_flush_kern_all(void);
extern void __cpuc_flush_user_all(void);
extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
extern void __cpuc_coherent_kern_range(unsigned long, unsigned long);
extern void __cpuc_coherent_user_range(unsigned long, unsigned long);
extern void __cpuc_flush_dcache_page(void *);
extern void __cpuc_flush_dcache_area(void *, size_t);
/*
* These are private to the dma-mapping API. Do not use directly.
@ -448,7 +448,7 @@ static inline void flush_kernel_dcache_page(struct page *page)
{
/* highmem pages are always flushed upon kunmap already */
if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page))
__cpuc_flush_dcache_page(page_address(page));
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
}
#define flush_dcache_mmap_lock(mapping) \
@ -465,13 +465,6 @@ static inline void flush_kernel_dcache_page(struct page *page)
*/
#define flush_icache_page(vma,page) do { } while (0)
static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
unsigned offset, size_t size)
{
const void *start = (void __force *)virt + offset;
dmac_inv_range(start, start + size);
}
/*
* flush_cache_vmap() is used when creating mappings (eg, via vmap,
* vmalloc, ioremap etc) in kernel space for pages. On non-VIPT

1
arch/arm/include/asm/mach-types.h Normal file
View File

@ -0,0 +1 @@
#include <generated/mach-types.h>

6
arch/arm/mach-kirkwood/Kconfig
View File

@ -52,6 +52,12 @@ config MACH_OPENRD_BASE
Say 'Y' here if you want your kernel to support the
Marvell OpenRD Base Board.
config MACH_NETSPACE_V2
bool "LaCie Network Space v2 NAS Board"
help
Say 'Y' here if you want your kernel to support the
LaCie Network Space v2 NAS.
endmenu
endif

1
arch/arm/mach-kirkwood/Makefile
View File

@ -8,5 +8,6 @@ obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o
obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o

325
arch/arm/mach-kirkwood/netspace_v2-setup.c Normal file
View File

@ -0,0 +1,325 @@
/*
* arch/arm/mach-kirkwood/netspace_v2-setup.c
*
* LaCie Network Space v2 board setup
*
* Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
* Copyright (C) 2009 Benoît Canet <benoit.canet@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/flash.h>
#include <linux/spi/spi.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/kirkwood.h>
#include <plat/time.h>
#include "common.h"
#include "mpp.h"
/*****************************************************************************
* 512KB SPI Flash on Boot Device (MACRONIX MX25L4005)
****************************************************************************/
static struct mtd_partition netspace_v2_flash_parts[] = {
{
.name = "u-boot",
.size = MTDPART_SIZ_FULL,
.offset = 0,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
};
static const struct flash_platform_data netspace_v2_flash = {
.type = "mx25l4005a",
.name = "spi_flash",
.parts = netspace_v2_flash_parts,
.nr_parts = ARRAY_SIZE(netspace_v2_flash_parts),
};
static struct spi_board_info __initdata netspace_v2_spi_slave_info[] = {
{
.modalias = "m25p80",
.platform_data = &netspace_v2_flash,
.irq = -1,
.max_speed_hz = 20000000,
.bus_num = 0,
.chip_select = 0,
},
};
/*****************************************************************************
* Ethernet
****************************************************************************/
static struct mv643xx_eth_platform_data netspace_v2_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
/*****************************************************************************
* I2C devices
****************************************************************************/
static struct at24_platform_data at24c04 = {
.byte_len = SZ_4K / 8,
.page_size = 16,
};
/*
* i2c addr | chip | description
* 0x50 | HT24LC04 | eeprom (512B)
*/
static struct i2c_board_info __initdata netspace_v2_i2c_info[] = {
{
I2C_BOARD_INFO("24c04", 0x50),
.platform_data = &at24c04,
}
};
/*****************************************************************************
* SATA
****************************************************************************/
static struct mv_sata_platform_data netspace_v2_sata_data = {
.n_ports = 2,
};
#define NETSPACE_V2_GPIO_SATA0_POWER 16
#define NETSPACE_V2_GPIO_SATA1_POWER 17
static void __init netspace_v2_sata_power_init(void)
{
int err;
err = gpio_request(NETSPACE_V2_GPIO_SATA0_POWER, "SATA0 power");
if (err == 0) {
err = gpio_direction_output(NETSPACE_V2_GPIO_SATA0_POWER, 1);
if (err)
gpio_free(NETSPACE_V2_GPIO_SATA0_POWER);
}
if (err)
pr_err("netspace_v2: failed to setup SATA0 power\n");
}
/*****************************************************************************
* GPIO keys
****************************************************************************/
#define NETSPACE_V2_PUSH_BUTTON 32
static struct gpio_keys_button netspace_v2_buttons[] = {
[0] = {
.code = KEY_POWER,
.gpio = NETSPACE_V2_PUSH_BUTTON,
.desc = "Power push button",
.active_low = 0,
},
};
static struct gpio_keys_platform_data netspace_v2_button_data = {
.buttons = netspace_v2_buttons,
.nbuttons = ARRAY_SIZE(netspace_v2_buttons),
};
static struct platform_device netspace_v2_gpio_buttons = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &netspace_v2_button_data,
},
};
/*****************************************************************************
* GPIO LEDs
****************************************************************************/
/*
* The blue front LED is wired to a CPLD and can blink in relation with the
* SATA activity.
*
* The following array detail the different LED registers and the combination
* of their possible values:
*
* cmd_led | slow_led | /SATA active | LED state
* | | |
* 1 | 0 | x | off
* - | 1 | x | on
* 0 | 0 | 1 | on
* 0 | 0 | 0 | blink (rate 300ms)
*/
#define NETSPACE_V2_GPIO_RED_LED 12
#define NETSPACE_V2_GPIO_BLUE_LED_SLOW 29
#define NETSPACE_V2_GPIO_BLUE_LED_CMD 30
static struct gpio_led netspace_v2_gpio_led_pins[] = {
{
.name = "ns_v2:red:fail",
.gpio = NETSPACE_V2_GPIO_RED_LED,
},
};
static struct gpio_led_platform_data netspace_v2_gpio_leds_data = {
.num_leds = ARRAY_SIZE(netspace_v2_gpio_led_pins),
.leds = netspace_v2_gpio_led_pins,
};
static struct platform_device netspace_v2_gpio_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &netspace_v2_gpio_leds_data,
},
};
static void __init netspace_v2_gpio_leds_init(void)
{
platform_device_register(&netspace_v2_gpio_leds);
/*
* Configure the front blue LED to blink in relation with the SATA
* activity.
*/
if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW,
"SATA blue LED slow") != 0)
return;
if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0) != 0)
goto err_free_1;
if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_CMD,
"SATA blue LED command") != 0)
goto err_free_1;
if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_CMD, 0) != 0)
goto err_free_2;
return;
err_free_2:
gpio_free(NETSPACE_V2_GPIO_BLUE_LED_CMD);
err_free_1:
gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
pr_err("netspace_v2: failed to configure SATA blue LED\n");
}
/*****************************************************************************
* Timer
****************************************************************************/
static void netspace_v2_timer_init(void)
{
kirkwood_tclk = 166666667;
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
}
struct sys_timer netspace_v2_timer = {
.init = netspace_v2_timer_init,
};
/*****************************************************************************
* General Setup
****************************************************************************/
static unsigned int netspace_v2_mpp_config[] __initdata = {
MPP0_SPI_SCn,
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_GPO, /* Red led */
MPP14_GPIO, /* USB fuse */
MPP16_GPIO, /* SATA 0 power */
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_SATA1_ACTn,
MPP21_SATA0_ACTn,
MPP24_GPIO, /* USB mode select */
MPP25_GPIO, /* Fan rotation fail */
MPP26_GPIO, /* USB device vbus */
MPP28_GPIO, /* USB enable host vbus */
MPP29_GPIO, /* Blue led (slow register) */
MPP30_GPIO, /* Blue led (command register) */
MPP31_GPIO, /* Board power off */
MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */
0
};
#define NETSPACE_V2_GPIO_POWER_OFF 31
static void netspace_v2_power_off(void)
{
gpio_set_value(NETSPACE_V2_GPIO_POWER_OFF, 1);
}
static void __init netspace_v2_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_init();
kirkwood_mpp_conf(netspace_v2_mpp_config);
netspace_v2_sata_power_init();
kirkwood_ehci_init();
kirkwood_ge00_init(&netspace_v2_ge00_data);
kirkwood_sata_init(&netspace_v2_sata_data);
kirkwood_uart0_init();
spi_register_board_info(netspace_v2_spi_slave_info,
ARRAY_SIZE(netspace_v2_spi_slave_info));
kirkwood_spi_init();
kirkwood_i2c_init();
i2c_register_board_info(0, netspace_v2_i2c_info,
ARRAY_SIZE(netspace_v2_i2c_info));
netspace_v2_gpio_leds_init();
platform_device_register(&netspace_v2_gpio_buttons);
if (gpio_request(NETSPACE_V2_GPIO_POWER_OFF, "power-off") == 0 &&
gpio_direction_output(NETSPACE_V2_GPIO_POWER_OFF, 0) == 0)
pm_power_off = netspace_v2_power_off;
else
pr_err("netspace_v2: failed to configure power-off GPIO\n");
}
MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
.phys_io = KIRKWOOD_REGS_PHYS_BASE,
.io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
.init_machine = netspace_v2_init,
.map_io = kirkwood_map_io,
.init_irq = kirkwood_init_irq,
.timer = &netspace_v2_timer,
MACHINE_END

1
arch/arm/mach-omap2/Kconfig
View File

@ -18,6 +18,7 @@ config ARCH_OMAP2430
config ARCH_OMAP34XX
bool "OMAP34xx Based System"
depends on ARCH_OMAP3
select USB_ARCH_HAS_EHCI
config ARCH_OMAP3430
bool "OMAP3430 support"

2
arch/arm/mach-omap2/board-cm-t35.c
View File

@ -29,7 +29,7 @@
#include <linux/gpio.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>

2
arch/arm/mach-omap2/board-igep0020.c
View File

@ -19,7 +19,7 @@
#include <linux/interrupt.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -26,7 +26,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <linux/usb/otg.h>
#include <linux/smsc911x.h>

2
arch/arm/mach-omap2/board-omap3touchbook.c
View File

@ -34,7 +34,7 @@
#include <linux/spi/ads7846.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

2
arch/arm/mach-omap2/board-rx51-peripherals.c
View File

@ -16,7 +16,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/wl12xx.h>
#include <linux/i2c.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>

2
arch/arm/mach-omap2/board-zoom-peripherals.c
View File

@ -14,7 +14,7 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio.h>
#include <linux/i2c/twl4030.h>
#include <linux/i2c/twl.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>

7
arch/arm/mach-omap2/serial.c
View File

@ -640,12 +640,9 @@ void __init omap_serial_early_init(void)
uart->num = i;
p->private_data = uart;
uart->p = p;
list_add_tail(&uart->node, &uart_list);
if (cpu_is_omap44xx())
p->irq += 32;
omap_uart_enable_clocks(uart);
}
}
@ -673,9 +670,13 @@ void __init omap_serial_init_port(int port)
pdev = &uart->pdev;
dev = &pdev->dev;
omap_uart_enable_clocks(uart);
omap_uart_reset(uart);
omap_uart_idle_init(uart);
list_add_tail(&uart->node, &uart_list);
if (WARN_ON(platform_device_register(pdev)))
return;

3
arch/arm/mach-pxa/Kconfig
View File

@ -110,6 +110,8 @@ config MACH_CM_X300
bool "CompuLab CM-X300 modules"
select PXA3xx
select CPU_PXA300
select CPU_PXA310
select HAVE_PWM
config ARCH_GUMSTIX
bool "Gumstix XScale 255 boards"
@ -240,7 +242,6 @@ config MACH_COLIBRI300
select PXA3xx
select CPU_PXA300
select CPU_PXA310
select HAVE_PWM
config MACH_COLIBRI320
bool "Toradex Colibri PXA320"

2
arch/arm/mach-pxa/devices.c
View File

@ -4,7 +4,6 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/udc.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
@ -14,6 +13,7 @@
#include <mach/pxa2xx_spi.h>
#include <mach/camera.h>
#include <mach/audio.h>
#include <mach/hardware.h>
#include <plat/i2c.h>
#include <plat/pxa3xx_nand.h>

2
arch/arm/mach-s3c2410/include/mach/spi.h
View File

@ -18,6 +18,8 @@ struct s3c2410_spi_info {
unsigned int num_cs; /* total chipselects */
int bus_num; /* bus number to use. */
unsigned int use_fiq:1; /* use fiq */
void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};

11
arch/arm/mm/cache-fa.S
View File

@ -127,15 +127,16 @@ ENTRY(fa_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(kaddr)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure that the data held in the page kaddr is written back
* to the page in question.
*
* - kaddr - kernel address (guaranteed to be page aligned)
* - addr - kernel address
* - size - size of region
*/
ENTRY(fa_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(fa_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -213,7 +214,7 @@ ENTRY(fa_cache_fns)
.long fa_flush_user_cache_range
.long fa_coherent_kern_range
.long fa_coherent_user_range
.long fa_flush_kern_dcache_page
.long fa_flush_kern_dcache_area
.long fa_dma_inv_range
.long fa_dma_clean_range
.long fa_dma_flush_range

93
arch/arm/mm/cache-l2x0.c
View File

@ -28,69 +28,120 @@
static void __iomem *l2x0_base;
static DEFINE_SPINLOCK(l2x0_lock);
static inline void sync_writel(unsigned long val, unsigned long reg,
unsigned long complete_mask)
static inline void cache_wait(void __iomem *reg, unsigned long mask)
{
unsigned long flags;
spin_lock_irqsave(&l2x0_lock, flags);
writel(val, l2x0_base + reg);
/* wait for the operation to complete */
while (readl(l2x0_base + reg) & complete_mask)
while (readl(reg) & mask)
;
spin_unlock_irqrestore(&l2x0_lock, flags);
}
static inline void cache_sync(void)
{
sync_writel(0, L2X0_CACHE_SYNC, 1);
void __iomem *base = l2x0_base;
writel(0, base + L2X0_CACHE_SYNC);
cache_wait(base + L2X0_CACHE_SYNC, 1);
}
static inline void l2x0_inv_all(void)
{
unsigned long flags;
/* invalidate all ways */
sync_writel(0xff, L2X0_INV_WAY, 0xff);
spin_lock_irqsave(&l2x0_lock, flags);
writel(0xff, l2x0_base + L2X0_INV_WAY);
cache_wait(l2x0_base + L2X0_INV_WAY, 0xff);
cache_sync();
spin_unlock_irqrestore(&l2x0_lock, flags);
}
static void l2x0_inv_range(unsigned long start, unsigned long end)
{
unsigned long addr;
void __iomem *base = l2x0_base;
unsigned long flags;
spin_lock_irqsave(&l2x0_lock, flags);
if (start & (CACHE_LINE_SIZE - 1)) {
start &= ~(CACHE_LINE_SIZE - 1);
sync_writel(start, L2X0_CLEAN_INV_LINE_PA, 1);
cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
writel(start, base + L2X0_CLEAN_INV_LINE_PA);
start += CACHE_LINE_SIZE;
}
if (end & (CACHE_LINE_SIZE - 1)) {
end &= ~(CACHE_LINE_SIZE - 1);
sync_writel(end, L2X0_CLEAN_INV_LINE_PA, 1);
cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
writel(end, base + L2X0_CLEAN_INV_LINE_PA);
}
for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
sync_writel(addr, L2X0_INV_LINE_PA, 1);
while (start < end) {
unsigned long blk_end = start + min(end - start, 4096UL);
while (start < blk_end) {
cache_wait(base + L2X0_INV_LINE_PA, 1);
writel(start, base + L2X0_INV_LINE_PA);
start += CACHE_LINE_SIZE;
}
if (blk_end < end) {
spin_unlock_irqrestore(&l2x0_lock, flags);
spin_lock_irqsave(&l2x0_lock, flags);
}
}
cache_wait(base + L2X0_INV_LINE_PA, 1);
cache_sync();
spin_unlock_irqrestore(&l2x0_lock, flags);
}
static void l2x0_clean_range(unsigned long start, unsigned long end)
{
unsigned long addr;
void __iomem *base = l2x0_base;
unsigned long flags;
spin_lock_irqsave(&l2x0_lock, flags);
start &= ~(CACHE_LINE_SIZE - 1);
for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
sync_writel(addr, L2X0_CLEAN_LINE_PA, 1);
while (start < end) {
unsigned long blk_end = start + min(end - start, 4096UL);
while (start < blk_end) {
cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
writel(start, base + L2X0_CLEAN_LINE_PA);
start += CACHE_LINE_SIZE;
}
if (blk_end < end) {
spin_unlock_irqrestore(&l2x0_lock, flags);
spin_lock_irqsave(&l2x0_lock, flags);
}
}
cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
cache_sync();
spin_unlock_irqrestore(&l2x0_lock, flags);
}
static void l2x0_flush_range(unsigned long start, unsigned long end)
{
unsigned long addr;
void __iomem *base = l2x0_base;
unsigned long flags;
spin_lock_irqsave(&l2x0_lock, flags);
start &= ~(CACHE_LINE_SIZE - 1);
for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
sync_writel(addr, L2X0_CLEAN_INV_LINE_PA, 1);
while (start < end) {
unsigned long blk_end = start + min(end - start, 4096UL);
while (start < blk_end) {
cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
writel(start, base + L2X0_CLEAN_INV_LINE_PA);
start += CACHE_LINE_SIZE;
}
if (blk_end < end) {
spin_unlock_irqrestore(&l2x0_lock, flags);
spin_lock_irqsave(&l2x0_lock, flags);
}
}
cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
cache_sync();
spin_unlock_irqrestore(&l2x0_lock, flags);
}
void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)

9
arch/arm/mm/cache-v3.S
View File

@ -72,14 +72,15 @@ ENTRY(v3_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *page, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(v3_flush_kern_dcache_page)
ENTRY(v3_flush_kern_dcache_area)
/* FALLTHROUGH */
/*
@ -129,7 +130,7 @@ ENTRY(v3_cache_fns)
.long v3_flush_user_cache_range
.long v3_coherent_kern_range
.long v3_coherent_user_range
.long v3_flush_kern_dcache_page
.long v3_flush_kern_dcache_area
.long v3_dma_inv_range
.long v3_dma_clean_range
.long v3_dma_flush_range

9
arch/arm/mm/cache-v4.S
View File

@ -82,14 +82,15 @@ ENTRY(v4_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(v4_flush_kern_dcache_page)
ENTRY(v4_flush_kern_dcache_area)
/* FALLTHROUGH */
/*
@ -141,7 +142,7 @@ ENTRY(v4_cache_fns)
.long v4_flush_user_cache_range
.long v4_coherent_kern_range
.long v4_coherent_user_range
.long v4_flush_kern_dcache_page
.long v4_flush_kern_dcache_area
.long v4_dma_inv_range
.long v4_dma_clean_range
.long v4_dma_flush_range

11
arch/arm/mm/cache-v4wb.S
View File

@ -114,15 +114,16 @@ ENTRY(v4wb_flush_user_cache_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(v4wb_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(v4wb_flush_kern_dcache_area)
add r1, r0, r1
/* fall through */
/*
@ -224,7 +225,7 @@ ENTRY(v4wb_cache_fns)
.long v4wb_flush_user_cache_range
.long v4wb_coherent_kern_range
.long v4wb_coherent_user_range
.long v4wb_flush_kern_dcache_page
.long v4wb_flush_kern_dcache_area
.long v4wb_dma_inv_range
.long v4wb_dma_clean_range
.long v4wb_dma_flush_range

11
arch/arm/mm/cache-v4wt.S
View File

@ -117,17 +117,18 @@ ENTRY(v4wt_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(v4wt_flush_kern_dcache_page)
ENTRY(v4wt_flush_kern_dcache_area)
mov r2, #0
mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache
add r1, r0, #PAGE_SZ
add r1, r0, r1
/* fallthrough */
/*
@ -180,7 +181,7 @@ ENTRY(v4wt_cache_fns)
.long v4wt_flush_user_cache_range
.long v4wt_coherent_kern_range
.long v4wt_coherent_user_range
.long v4wt_flush_kern_dcache_page
.long v4wt_flush_kern_dcache_area
.long v4wt_dma_inv_range
.long v4wt_dma_clean_range
.long v4wt_dma_flush_range

11
arch/arm/mm/cache-v6.S
View File

@ -159,15 +159,16 @@ ENDPROC(v6_coherent_user_range)
ENDPROC(v6_coherent_kern_range)
/*
* v6_flush_kern_dcache_page(kaddr)
* v6_flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure that the data held in the page kaddr is written back
* to the page in question.
*
* - kaddr - kernel address (guaranteed to be page aligned)
* - addr - kernel address
* - size - region size
*/
ENTRY(v6_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(v6_flush_kern_dcache_area)
add r1, r0, r1
1:
#ifdef HARVARD_CACHE
mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
@ -271,7 +272,7 @@ ENTRY(v6_cache_fns)
.long v6_flush_user_cache_range
.long v6_coherent_kern_range
.long v6_coherent_user_range
.long v6_flush_kern_dcache_page
.long v6_flush_kern_dcache_area
.long v6_dma_inv_range
.long v6_dma_clean_range
.long v6_dma_flush_range

13
arch/arm/mm/cache-v7.S
View File

@ -186,16 +186,17 @@ ENDPROC(v7_coherent_kern_range)
ENDPROC(v7_coherent_user_range)
/*
* v7_flush_kern_dcache_page(kaddr)
* v7_flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure that the data held in the page kaddr is written back
* to the page in question.
*
* - kaddr - kernel address (guaranteed to be page aligned)
* - addr - kernel address
* - size - region size
*/
ENTRY(v7_flush_kern_dcache_page)
ENTRY(v7_flush_kern_dcache_area)
dcache_line_size r2, r3
add r1, r0, #PAGE_SZ
add r1, r0, r1
1:
mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line
add r0, r0, r2
@ -203,7 +204,7 @@ ENTRY(v7_flush_kern_dcache_page)
blo 1b
dsb
mov pc, lr
ENDPROC(v7_flush_kern_dcache_page)
ENDPROC(v7_flush_kern_dcache_area)
/*
* v7_dma_inv_range(start,end)
@ -279,7 +280,7 @@ ENTRY(v7_cache_fns)
.long v7_flush_user_cache_range
.long v7_coherent_kern_range
.long v7_coherent_user_range
.long v7_flush_kern_dcache_page
.long v7_flush_kern_dcache_area
.long v7_dma_inv_range
.long v7_dma_clean_range
.long v7_dma_flush_range

4
arch/arm/mm/flush.c
View File

@ -131,7 +131,7 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page)
*/
if (addr)
#endif
__cpuc_flush_dcache_page(addr);
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
/*
* If this is a page cache page, and we have an aliasing VIPT cache,
@ -258,5 +258,5 @@ void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned l
* in this mapping of the page. FIXME: this is overkill
* since we actually ask for a write-back and invalidate.
*/
__cpuc_flush_dcache_page(page_address(page));
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
}

2
arch/arm/mm/highmem.c
View File

@ -79,7 +79,7 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
if (kvaddr >= (void *)FIXADDR_START) {
__cpuc_flush_dcache_page((void *)vaddr);
__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
#ifdef CONFIG_DEBUG_HIGHMEM
BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);

2
arch/arm/mm/nommu.c
View File

@ -61,7 +61,7 @@ void setup_mm_for_reboot(char mode)
void flush_dcache_page(struct page *page)
{
__cpuc_flush_dcache_page(page_address(page));
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
}
EXPORT_SYMBOL(flush_dcache_page);

11
arch/arm/mm/proc-arm1020.S
View File

@ -231,17 +231,18 @@ ENTRY(arm1020_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - page - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm1020_flush_kern_dcache_page)
ENTRY(arm1020_flush_kern_dcache_area)
mov ip, #0
#ifndef CONFIG_CPU_DCACHE_DISABLE
add r1, r0, #PAGE_SZ
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
mcr p15, 0, ip, c7, c10, 4 @ drain WB
add r0, r0, #CACHE_DLINESIZE
@ -335,7 +336,7 @@ ENTRY(arm1020_cache_fns)
.long arm1020_flush_user_cache_range
.long arm1020_coherent_kern_range
.long arm1020_coherent_user_range
.long arm1020_flush_kern_dcache_page
.long arm1020_flush_kern_dcache_area
.long arm1020_dma_inv_range
.long arm1020_dma_clean_range
.long arm1020_dma_flush_range

11
arch/arm/mm/proc-arm1020e.S
View File

@ -225,17 +225,18 @@ ENTRY(arm1020e_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - page - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm1020e_flush_kern_dcache_page)
ENTRY(arm1020e_flush_kern_dcache_area)
mov ip, #0
#ifndef CONFIG_CPU_DCACHE_DISABLE
add r1, r0, #PAGE_SZ
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -321,7 +322,7 @@ ENTRY(arm1020e_cache_fns)
.long arm1020e_flush_user_cache_range
.long arm1020e_coherent_kern_range
.long arm1020e_coherent_user_range
.long arm1020e_flush_kern_dcache_page
.long arm1020e_flush_kern_dcache_area
.long arm1020e_dma_inv_range
.long arm1020e_dma_clean_range
.long arm1020e_dma_flush_range

11
arch/arm/mm/proc-arm1022.S
View File

@ -214,17 +214,18 @@ ENTRY(arm1022_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - page - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm1022_flush_kern_dcache_page)
ENTRY(arm1022_flush_kern_dcache_area)
mov ip, #0
#ifndef CONFIG_CPU_DCACHE_DISABLE
add r1, r0, #PAGE_SZ
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -310,7 +311,7 @@ ENTRY(arm1022_cache_fns)
.long arm1022_flush_user_cache_range
.long arm1022_coherent_kern_range
.long arm1022_coherent_user_range
.long arm1022_flush_kern_dcache_page
.long arm1022_flush_kern_dcache_area
.long arm1022_dma_inv_range
.long arm1022_dma_clean_range
.long arm1022_dma_flush_range

11
arch/arm/mm/proc-arm1026.S
View File

@ -208,17 +208,18 @@ ENTRY(arm1026_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - page - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm1026_flush_kern_dcache_page)
ENTRY(arm1026_flush_kern_dcache_area)
mov ip, #0
#ifndef CONFIG_CPU_DCACHE_DISABLE
add r1, r0, #PAGE_SZ
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -304,7 +305,7 @@ ENTRY(arm1026_cache_fns)
.long arm1026_flush_user_cache_range
.long arm1026_coherent_kern_range
.long arm1026_coherent_user_range
.long arm1026_flush_kern_dcache_page
.long arm1026_flush_kern_dcache_area
.long arm1026_dma_inv_range
.long arm1026_dma_clean_range
.long arm1026_dma_flush_range

11
arch/arm/mm/proc-arm920.S
View File

@ -207,15 +207,16 @@ ENTRY(arm920_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm920_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(arm920_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -293,7 +294,7 @@ ENTRY(arm920_cache_fns)
.long arm920_flush_user_cache_range
.long arm920_coherent_kern_range
.long arm920_coherent_user_range
.long arm920_flush_kern_dcache_page
.long arm920_flush_kern_dcache_area
.long arm920_dma_inv_range
.long arm920_dma_clean_range
.long arm920_dma_flush_range

11
arch/arm/mm/proc-arm922.S
View File

@ -209,15 +209,16 @@ ENTRY(arm922_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm922_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(arm922_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -295,7 +296,7 @@ ENTRY(arm922_cache_fns)
.long arm922_flush_user_cache_range
.long arm922_coherent_kern_range
.long arm922_coherent_user_range
.long arm922_flush_kern_dcache_page
.long arm922_flush_kern_dcache_area
.long arm922_dma_inv_range
.long arm922_dma_clean_range
.long arm922_dma_flush_range

11
arch/arm/mm/proc-arm925.S
View File

@ -251,15 +251,16 @@ ENTRY(arm925_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm925_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(arm925_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -346,7 +347,7 @@ ENTRY(arm925_cache_fns)
.long arm925_flush_user_cache_range
.long arm925_coherent_kern_range
.long arm925_coherent_user_range
.long arm925_flush_kern_dcache_page
.long arm925_flush_kern_dcache_area
.long arm925_dma_inv_range
.long arm925_dma_clean_range
.long arm925_dma_flush_range

11
arch/arm/mm/proc-arm926.S
View File

@ -214,15 +214,16 @@ ENTRY(arm926_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm926_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(arm926_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -309,7 +310,7 @@ ENTRY(arm926_cache_fns)
.long arm926_flush_user_cache_range
.long arm926_coherent_kern_range
.long arm926_coherent_user_range
.long arm926_flush_kern_dcache_page
.long arm926_flush_kern_dcache_area
.long arm926_dma_inv_range
.long arm926_dma_clean_range
.long arm926_dma_flush_range

9
arch/arm/mm/proc-arm940.S
View File

@ -141,14 +141,15 @@ ENTRY(arm940_coherent_user_range)
/* FALLTHROUGH */
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(arm940_flush_kern_dcache_page)
ENTRY(arm940_flush_kern_dcache_area)
mov ip, #0
mov r1, #(CACHE_DSEGMENTS - 1) << 4 @ 4 segments
1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
@ -238,7 +239,7 @@ ENTRY(arm940_cache_fns)
.long arm940_flush_user_cache_range
.long arm940_coherent_kern_range
.long arm940_coherent_user_range
.long arm940_flush_kern_dcache_page
.long arm940_flush_kern_dcache_area
.long arm940_dma_inv_range
.long arm940_dma_clean_range
.long arm940_dma_flush_range

11
arch/arm/mm/proc-arm946.S
View File

@ -183,16 +183,17 @@ ENTRY(arm946_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
* (same as arm926)
*/
ENTRY(arm946_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(arm946_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -280,7 +281,7 @@ ENTRY(arm946_cache_fns)
.long arm946_flush_user_cache_range
.long arm946_coherent_kern_range
.long arm946_coherent_user_range
.long arm946_flush_kern_dcache_page
.long arm946_flush_kern_dcache_area
.long arm946_dma_inv_range
.long arm946_dma_clean_range
.long arm946_dma_flush_range

15
arch/arm/mm/proc-feroceon.S
View File

@ -226,16 +226,17 @@ ENTRY(feroceon_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
.align 5
ENTRY(feroceon_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(feroceon_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -246,7 +247,7 @@ ENTRY(feroceon_flush_kern_dcache_page)
mov pc, lr
.align 5
ENTRY(feroceon_range_flush_kern_dcache_page)
ENTRY(feroceon_range_flush_kern_dcache_area)
mrs r2, cpsr
add r1, r0, #PAGE_SZ - CACHE_DLINESIZE @ top addr is inclusive
orr r3, r2, #PSR_I_BIT
@ -372,7 +373,7 @@ ENTRY(feroceon_cache_fns)
.long feroceon_flush_user_cache_range
.long feroceon_coherent_kern_range
.long feroceon_coherent_user_range
.long feroceon_flush_kern_dcache_page
.long feroceon_flush_kern_dcache_area
.long feroceon_dma_inv_range
.long feroceon_dma_clean_range
.long feroceon_dma_flush_range
@ -383,7 +384,7 @@ ENTRY(feroceon_range_cache_fns)
.long feroceon_flush_user_cache_range
.long feroceon_coherent_kern_range
.long feroceon_coherent_user_range
.long feroceon_range_flush_kern_dcache_page
.long feroceon_range_flush_kern_dcache_area
.long feroceon_range_dma_inv_range
.long feroceon_range_dma_clean_range
.long feroceon_range_dma_flush_range

11
arch/arm/mm/proc-mohawk.S
View File

@ -186,15 +186,16 @@ ENTRY(mohawk_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(mohawk_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(mohawk_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
add r0, r0, #CACHE_DLINESIZE
cmp r0, r1
@ -273,7 +274,7 @@ ENTRY(mohawk_cache_fns)
.long mohawk_flush_user_cache_range
.long mohawk_coherent_kern_range
.long mohawk_coherent_user_range
.long mohawk_flush_kern_dcache_page
.long mohawk_flush_kern_dcache_area
.long mohawk_dma_inv_range
.long mohawk_dma_clean_range
.long mohawk_dma_flush_range

3
arch/arm/mm/proc-syms.c
View File

@ -27,8 +27,7 @@ EXPORT_SYMBOL(__cpuc_flush_kern_all);
EXPORT_SYMBOL(__cpuc_flush_user_all);
EXPORT_SYMBOL(__cpuc_flush_user_range);
EXPORT_SYMBOL(__cpuc_coherent_kern_range);
EXPORT_SYMBOL(__cpuc_flush_dcache_page);
EXPORT_SYMBOL(dmac_inv_range); /* because of flush_ioremap_region() */
EXPORT_SYMBOL(__cpuc_flush_dcache_area);
#else
EXPORT_SYMBOL(cpu_cache);
#endif

5
arch/arm/mm/proc-v6.S
View File

@ -254,10 +254,9 @@ __pj4_v6_proc_info:
.long 0x560f5810
.long 0xff0ffff0
.long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
PMD_SECT_AP_READ | \
PMD_FLAGS
.long PMD_TYPE_SECT | \
PMD_SECT_XN | \
PMD_SECT_AP_WRITE | \

11
arch/arm/mm/proc-xsc3.S
View File

@ -226,15 +226,16 @@ ENTRY(xsc3_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache.
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(xsc3_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(xsc3_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
add r0, r0, #CACHELINESIZE
cmp r0, r1
@ -309,7 +310,7 @@ ENTRY(xsc3_cache_fns)
.long xsc3_flush_user_cache_range
.long xsc3_coherent_kern_range
.long xsc3_coherent_user_range
.long xsc3_flush_kern_dcache_page
.long xsc3_flush_kern_dcache_area
.long xsc3_dma_inv_range
.long xsc3_dma_clean_range
.long xsc3_dma_flush_range

13
arch/arm/mm/proc-xscale.S
View File

@ -284,15 +284,16 @@ ENTRY(xscale_coherent_user_range)
mov pc, lr
/*
* flush_kern_dcache_page(void *page)
* flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
* - addr - page aligned address
* - addr - kernel address
* - size - region size
*/
ENTRY(xscale_flush_kern_dcache_page)
add r1, r0, #PAGE_SZ
ENTRY(xscale_flush_kern_dcache_area)
add r1, r0, r1
1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
add r0, r0, #CACHELINESIZE
@ -368,7 +369,7 @@ ENTRY(xscale_cache_fns)
.long xscale_flush_user_cache_range
.long xscale_coherent_kern_range
.long xscale_coherent_user_range
.long xscale_flush_kern_dcache_page
.long xscale_flush_kern_dcache_area
.long xscale_dma_inv_range
.long xscale_dma_clean_range
.long xscale_dma_flush_range
@ -392,7 +393,7 @@ ENTRY(xscale_80200_A0_A1_cache_fns)
.long xscale_flush_user_cache_range
.long xscale_coherent_kern_range
.long xscale_coherent_user_range
.long xscale_flush_kern_dcache_page
.long xscale_flush_kern_dcache_area
.long xscale_dma_flush_range
.long xscale_dma_clean_range
.long xscale_dma_flush_range

2
arch/arm/tools/Makefile
View File

@ -4,7 +4,7 @@
# Copyright (C) 2001 Russell King
#
include/asm-arm/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
@echo ' Generating $@'
@mkdir -p $(dir $@)
$(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }

2
arch/arm/tools/gen-mach-types
View File

@ -1,6 +1,6 @@
#!/bin/awk
#
# Awk script to generate include/asm-arm/mach-types.h
# Awk script to generate include/generated/mach-types.h
#
BEGIN { nr = 0 }
/^#/ { next }

44
arch/arm/tools/mach-types
View File

@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Wed Nov 25 22:14:58 2009
# Last update: Wed Dec 16 20:06:34 2009
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -1776,6 +1776,7 @@ cybook3 MACH_CYBOOK3 CYBOOK3 1784
wdg002 MACH_WDG002 WDG002 1785
sg560adsl MACH_SG560ADSL SG560ADSL 1786
nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787
dove_db MACH_DOVE_DB DOVE_DB 1788
marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789
vandihud MACH_VANDIHUD VANDIHUD 1790
magx_e8 MACH_MAGX_E8 MAGX_E8 1791
@ -2536,3 +2537,44 @@ c3ax03 MACH_C3AX03 C3AX03 2549
mxt_td60 MACH_MXT_TD60 MXT_TD60 2550
esyx MACH_ESYX ESYX 2551
bulldog MACH_BULLDOG BULLDOG 2553
derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554
bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555
bcmring_evm MACH_BCMRING_EVM BCMRING_EVM 2556
bcmring_evm_jazz MACH_BCMRING_EVM_JAZZ BCMRING_EVM_JAZZ 2557
bcmring_sp MACH_BCMRING_SP BCMRING_SP 2558
bcmring_sv MACH_BCMRING_SV BCMRING_SV 2559
bcmring_sv_jazz MACH_BCMRING_SV_JAZZ BCMRING_SV_JAZZ 2560
bcmring_tablet MACH_BCMRING_TABLET BCMRING_TABLET 2561
bcmring_vp MACH_BCMRING_VP BCMRING_VP 2562
bcmring_evm_seikor MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR 2563
bcmring_sp_wqvga MACH_BCMRING_SP_WQVGA BCMRING_SP_WQVGA 2564
bcmring_custom MACH_BCMRING_CUSTOM BCMRING_CUSTOM 2565
acer_s200 MACH_ACER_S200 ACER_S200 2566
bt270 MACH_BT270 BT270 2567
iseo MACH_ISEO ISEO 2568
cezanne MACH_CEZANNE CEZANNE 2569
lucca MACH_LUCCA LUCCA 2570
supersmart MACH_SUPERSMART SUPERSMART 2571
magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573
emxx MACH_EMXX EMXX 2574
outlaw MACH_OUTLAW OUTLAW 2575
riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576
riot_vox MACH_RIOT_VOX RIOT_VOX 2577
riot_x37 MACH_RIOT_X37 RIOT_X37 2578
mega25mx MACH_MEGA25MX MEGA25MX 2579
benzina2 MACH_BENZINA2 BENZINA2 2580
ignite MACH_IGNITE IGNITE 2581
foggia MACH_FOGGIA FOGGIA 2582
arezzo MACH_AREZZO AREZZO 2583
leica_skywalker MACH_LEICA_SKYWALKER LEICA_SKYWALKER 2584
jacinto2_jamr MACH_JACINTO2_JAMR JACINTO2_JAMR 2585
gts_nova MACH_GTS_NOVA GTS_NOVA 2586
p3600 MACH_P3600 P3600 2587
dlt2 MACH_DLT2 DLT2 2588
df3120 MACH_DF3120 DF3120 2589
ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590
nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591
glacier MACH_GLACIER GLACIER 2592
phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
pca101 MACH_PCA101 PCA101 2595

1
arch/avr32/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

1
arch/blackfin/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

1
arch/cris/arch-v32/kernel/head.S
View File

@ -10,7 +10,6 @@
* The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
* -traditional must not be used when assembling this file.
*/
#include <linux/autoconf.h>
#include <arch/memmap.h>
#include <hwregs/reg_rdwr.h>
#include <hwregs/intr_vect.h>

1
arch/cris/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

1
arch/cris/kernel/asm-offsets.c
View File

@ -1,6 +1,5 @@
#include <linux/sched.h>
#include <asm/thread_info.h>
#include <linux/autoconf.h>
/*
* Generate definitions needed by assembly language modules.

1
arch/cris/kernel/vmlinux.lds.S
View File

@ -8,7 +8,6 @@
* the kernel has booted.
*/
#include <linux/autoconf.h>
#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>

1
arch/frv/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

2
arch/frv/kernel/setup.c
View File

@ -10,7 +10,7 @@
* 2 of the License, or (at your option) any later version.
*/
#include <linux/utsrelease.h>
#include <generated/utsrelease.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/delay.h>

1
arch/h8300/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

2
arch/ia64/Makefile
View File

@ -103,4 +103,4 @@ archprepare: make_nr_irqs_h FORCE
PHONY += make_nr_irqs_h FORCE
make_nr_irqs_h: FORCE
$(Q)$(MAKE) $(build)=arch/ia64/kernel include/asm-ia64/nr-irqs.h
$(Q)$(MAKE) $(build)=arch/ia64/kernel include/generated/nr-irqs.h

1
arch/ia64/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

2
arch/ia64/include/asm/irq.h
View File

@ -13,7 +13,7 @@
#include <linux/types.h>
#include <linux/cpumask.h>
#include <asm-ia64/nr-irqs.h>
#include <generated/nr-irqs.h>
static __inline__ int
irq_canonicalize (int irq)

7
arch/ia64/kernel/Makefile
View File

@ -81,17 +81,14 @@ define cmd_nr_irqs
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(SRCARCH)/kernel/nr-irqs.s: $(srctree)/arch/$(SRCARCH)/kernel/nr-irqs.c \
$(wildcard $(srctree)/include/asm-ia64/*/irq.h)
arch/$(SRCARCH)/kernel/nr-irqs.s: arch/$(SRCARCH)/kernel/nr-irqs.c
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
include/asm-ia64/nr-irqs.h: arch/$(SRCARCH)/kernel/nr-irqs.s
include/generated/nr-irqs.h: arch/$(SRCARCH)/kernel/nr-irqs.s
$(Q)mkdir -p $(dir $@)
$(call cmd,nr_irqs)
clean-files += $(objtree)/include/asm-ia64/nr-irqs.h
#
# native ivt.S, entry.S and fsys.S
#

1
arch/ia64/kvm/asm-offsets.c
View File

@ -22,7 +22,6 @@
*
*/
#include <linux/autoconf.h>
#include <linux/kvm_host.h>
#include <linux/kbuild.h>

1
arch/m68k/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

2
arch/m68k/kernel/head.S
View File

@ -196,7 +196,7 @@
* for them and trying to understand what they mean.
*
* CONFIG_xxx: These are the obvious machine configuration defines created
* during configuration. These are defined in include/linux/autoconf.h.
* during configuration. These are defined in autoconf.h.
*
* CONSOLE: There is support for head.S console in this file. This
* console can talk to a Mac frame buffer, but could easily be extrapolated

1
arch/microblaze/include/asm/asm-offsets.h Normal file
View File

@ -0,0 +1 @@
#include <generated/asm-offsets.h>

119
arch/mips/Kconfig
View File

@ -5,9 +5,12 @@ config MIPS
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_ARCH_KGDB
# Horrible source of confusion. Die, die, die ...
select EMBEDDED
select RTC_LIB if !LEMOTE_FULOONG2E
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_TRACE_MCOUNT_TEST
select HAVE_DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_TRACER
select RTC_LIB if !MACH_LOONGSON
mainmenu "Linux/MIPS Kernel Configuration"
@ -22,6 +25,7 @@ choice
config MACH_ALCHEMY
bool "Alchemy processor based machines"
select SYS_SUPPORTS_ZBOOT
config AR7
bool "Texas Instruments AR7"
@ -36,6 +40,7 @@ config AR7
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT_UART16550
select GENERIC_GPIO
select GCD
select VLYNQ
@ -43,23 +48,6 @@ config AR7
Support for the Texas Instruments AR7 System-on-a-Chip
family: TNETD7100, 7200 and 7300.
config BASLER_EXCITE
bool "Basler eXcite smart camera"
select CEVT_R4K
select CSRC_R4K
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select IRQ_CPU_RM9K
select MIPS_RM9122
select SYS_HAS_CPU_RM9000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
help
The eXcite is a smart camera platform manufactured by
Basler Vision Technologies AG.
config BCM47XX
bool "BCM47XX based boards"
select CEVT_R4K
@ -192,6 +180,7 @@ config LASAT
config MACH_LOONGSON
bool "Loongson family of machines"
select SYS_SUPPORTS_ZBOOT_UART16550
help
This enables the support of Loongson family of machines.
@ -233,6 +222,7 @@ config MIPS_MALTA
select SYS_SUPPORTS_MIPS_CMP
select SYS_SUPPORTS_MULTITHREADING
select SYS_SUPPORTS_SMARTMIPS
select SYS_SUPPORTS_ZBOOT
help
This enables support for the MIPS Technologies Malta evaluation
board.
@ -334,6 +324,24 @@ config PMC_YOSEMITE
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra.
config POWERTV
bool "Cisco PowerTV"
select BOOT_ELF32
select CEVT_R4K
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CSRC_POWERTV
select DMA_NONCOHERENT
select HW_HAS_PCI
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select USB_OHCI_LITTLE_ENDIAN
help
This enables support for the Cisco PowerTV Platform.
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC
@ -674,11 +682,11 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/powertv/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
source "arch/mips/txx9/Kconfig"
@ -778,6 +786,9 @@ config CSRC_BCM1480
config CSRC_IOASIC
bool
config CSRC_POWERTV
bool
config CSRC_R4K_LIB
bool
@ -806,20 +817,6 @@ config DMA_NONCOHERENT
config DMA_NEED_PCI_MAP_STATE
bool
config EARLY_PRINTK
bool "Early printk" if EMBEDDED && DEBUG_KERNEL
depends on SYS_HAS_EARLY_PRINTK
default y
help
This option enables special console drivers which allow the kernel
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation,
it is not recommended because it looks ugly on some machines and
doesn't cooperate with an X server. You should normally say N here,
unless you want to debug such a crash.
config SYS_HAS_EARLY_PRINTK
bool
@ -1069,6 +1066,21 @@ config CPU_LOONGSON2E
The Loongson 2E processor implements the MIPS III instruction set
with many extensions.
It has an internal FPGA northbridge, which is compatiable to
bonito64.
config CPU_LOONGSON2F
bool "Loongson 2F"
depends on SYS_HAS_CPU_LOONGSON2F
select CPU_LOONGSON2
help
The Loongson 2F processor implements the MIPS III instruction set
with many extensions.
Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
have a similar programming interface with FPGA northbridge used in
Loongson2E.
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
depends on SYS_HAS_CPU_MIPS32_R1
@ -1294,6 +1306,16 @@ config CPU_CAVIUM_OCTEON
endchoice
config SYS_SUPPORTS_ZBOOT
bool
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
config SYS_SUPPORTS_ZBOOT_UART16550
bool
select SYS_SUPPORTS_ZBOOT
config CPU_LOONGSON2
bool
select CPU_SUPPORTS_32BIT_KERNEL
@ -1303,6 +1325,12 @@ config CPU_LOONGSON2
config SYS_HAS_CPU_LOONGSON2E
bool
config SYS_HAS_CPU_LOONGSON2F
bool
select CPU_SUPPORTS_CPUFREQ
select CPU_SUPPORTS_ADDRWINCFG if 64BIT
select CPU_SUPPORTS_UNCACHED_ACCELERATED
config SYS_HAS_CPU_MIPS32_R1
bool
@ -1411,8 +1439,17 @@ config CPU_SUPPORTS_32BIT_KERNEL
bool
config CPU_SUPPORTS_64BIT_KERNEL
bool
config CPU_SUPPORTS_CPUFREQ
bool
config CPU_SUPPORTS_ADDRWINCFG
bool
config CPU_SUPPORTS_HUGEPAGES
bool
config CPU_SUPPORTS_UNCACHED_ACCELERATED
bool
config MIPS_PGD_C0_CONTEXT
bool
default y if 64BIT && CPU_MIPSR2
#
# Set to y for ptrace access to watch registers.
@ -2024,15 +2061,6 @@ config STACKTRACE_SUPPORT
source "init/Kconfig"
config PROBE_INITRD_HEADER
bool "Probe initrd header created by addinitrd"
depends on BLK_DEV_INITRD
help
Probe initrd header at the last page of kernel image.
Say Y here if you are using arch/mips/boot/addinitrd.c to
add initrd or initramfs image to the kernel image.
Otherwise, say N.
source "kernel/Kconfig.freezer"
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
@ -2104,6 +2132,7 @@ config MMU
config I8253
bool
select MIPS_EXTERNAL_TIMER
config ZONE_DMA32
bool
@ -2180,6 +2209,8 @@ source "kernel/power/Kconfig"
endmenu
source "arch/mips/kernel/cpufreq/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"

59
arch/mips/Kconfig.debug
View File

@ -6,15 +6,66 @@ config TRACE_IRQFLAGS_SUPPORT
source "lib/Kconfig.debug"
config EARLY_PRINTK
bool "Early printk" if EMBEDDED
depends on SYS_HAS_EARLY_PRINTK
default y
help
This option enables special console drivers which allow the kernel
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation,
it is not recommended because it looks ugly on some machines and
doesn't cooperate with an X server. You should normally say N here,
unless you want to debug such a crash.
config CMDLINE_BOOL
bool "Built-in kernel command line"
default n
help
For most systems, it is firmware or second stage bootloader that
by default specifies the kernel command line options. However,
it might be necessary or advantageous to either override the
default kernel command line or add a few extra options to it.
For such cases, this option allows you to hardcode your own
command line options directly into the kernel. For that, you
should choose 'Y' here, and fill in the extra boot arguments
in CONFIG_CMDLINE.
The built-in options will be concatenated to the default command
line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default
command line will be ignored and replaced by the built-in string.
Most MIPS systems will normally expect 'N' here and rely upon
the command line from the firmware or the second-stage bootloader.
config CMDLINE
string "Default kernel command string"
depends on CMDLINE_BOOL
default ""
help
On some platforms, there is currently no way for the boot loader to
pass arguments to the kernel. For these platforms, you can supply
some command-line options at build time by entering them here. In
other cases you can specify kernel args so that you don't have
to set them up in board prom initialization routines.
pass arguments to the kernel. For these platforms, and for the cases
when you want to add some extra options to the command line or ignore
the default command line, you can supply some command-line options at
build time by entering them here. In other cases you can specify
kernel args so that you don't have to set them up in board prom
initialization routines.
For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE
options.
config CMDLINE_OVERRIDE
bool "Built-in command line overrides firware arguments"
default n
depends on CMDLINE_BOOL
help
By setting this option to 'Y' you will have your kernel ignore
command line arguments from firmware or second stage bootloader.
Instead, the built-in command line will be used exclusively.
Normally, you will choose 'N' here.
config DEBUG_STACK_USAGE
bool "Enable stack utilization instrumentation"

57
arch/mips/Makefile
View File

@ -48,7 +48,16 @@ ifneq ($(SUBARCH),$(ARCH))
endif
endif
ifndef CONFIG_FUNCTION_TRACER
cflags-y := -ffunction-sections
endif
ifdef CONFIG_FUNCTION_GRAPH_TRACER
ifndef KBUILD_MCOUNT_RA_ADDRESS
ifeq ($(call cc-option-yn,-mmcount-ra-address), y)
cflags-y += -mmcount-ra-address -DKBUILD_MCOUNT_RA_ADDRESS
endif
endif
endif
cflags-y += $(call cc-option, -mno-check-zero-division)
ifdef CONFIG_32BIT
@ -69,6 +78,7 @@ endif
all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32)
all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64)
all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
#
# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
@ -124,6 +134,8 @@ cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2E) += \
$(call cc-option,-march=loongson2e,-march=r4600)
cflags-$(CONFIG_CPU_LOONGSON2F) += \
$(call cc-option,-march=loongson2f,-march=r4600)
cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32 -Wa,--trap
@ -324,6 +336,7 @@ core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/
cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \
-mno-branch-likely
load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
load-$(CONFIG_LEMOTE_MACH2F) +=0xffffffff80200000
#
# MIPS Malta board
@ -331,7 +344,7 @@ load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
all-$(CONFIG_MIPS_MALTA) := vmlinuz.bin
#
# MIPS SIM
@ -355,13 +368,6 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
#
# Basler eXcite
#
core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000
#
# LASAT platforms
#
@ -440,6 +446,13 @@ cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
# Cisco PowerTV Platform
#
core-$(CONFIG_POWERTV) += arch/mips/powertv/
cflags-$(CONFIG_POWERTV) += -I$(srctree)/arch/mips/include/asm/mach-powertv
load-$(CONFIG_POWERTV) += 0xffffffff90800000
#
# SGI IP22 (Indy/Indigo2)
#
@ -581,7 +594,7 @@ load-$(CONFIG_SNI_RM) += 0xffffffff80600000
else
load-$(CONFIG_SNI_RM) += 0xffffffff80030000
endif
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
all-$(CONFIG_SNI_RM) := vmlinuz.ecoff
#
# Common TXx9
@ -699,9 +712,23 @@ vmlinux.64: vmlinux
$(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
makezboot =$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $(1)
all: $(all-y)
vmlinuz: vmlinux FORCE
+@$(call makezboot,$@)
vmlinuz.bin: vmlinux
+@$(call makezboot,$@)
vmlinuz.ecoff: vmlinux
+@$(call makezboot,$@)
vmlinuz.srec: vmlinux
+@$(call makezboot,$@)
vmlinux.bin: $(vmlinux-32)
+@$(call makeboot,$@)
@ -726,11 +753,13 @@ endif
install:
$(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE)
$(Q)install -D -m 755 vmlinuz $(INSTALL_PATH)/vmlinuz-$(KERNELRELEASE)
$(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
$(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)
archclean:
@$(MAKE) $(clean)=arch/mips/boot
@$(MAKE) $(clean)=arch/mips/boot/compressed
@$(MAKE) $(clean)=arch/mips/lasat
define archhelp
@ -738,10 +767,18 @@ define archhelp
echo ' vmlinux.ecoff - ECOFF boot image'
echo ' vmlinux.bin - Raw binary boot image'
echo ' vmlinux.srec - SREC boot image'
echo ' vmlinuz - Compressed boot(zboot) image'
echo ' vmlinuz.ecoff - ECOFF zboot image'
echo ' vmlinuz.bin - Raw binary zboot image'
echo ' vmlinuz.srec - SREC zboot image'
echo
echo ' These will be default as apropriate for a configured platform.'
endef
CLEAN_FILES += vmlinux.32 \
vmlinux.64 \
vmlinux.ecoff
vmlinux.ecoff \
vmlinuz \
vmlinuz.ecoff \
vmlinuz.bin \
vmlinuz.srec

2
arch/mips/ar7/platform.c
View File

@ -505,7 +505,7 @@ static int __init ar7_register_devices(void)
int res;
u32 *bootcr, val;
#ifdef CONFIG_SERIAL_8250
static struct uart_port uart_port[2];
static struct uart_port uart_port[2] __initdata;
memset(uart_port, 0, sizeof(struct uart_port) * 2);

9
arch/mips/basler/excite/Kconfig
View File

@ -1,9 +0,0 @@
config BASLER_EXCITE_PROTOTYPE
bool "Support for pre-release units"
depends on BASLER_EXCITE
default n
help
Pre-series (prototype) units are different from later ones in
some ways. Select this option if you have one of these. Please
note that a kernel built with this option selected will not be
able to run on normal units.

8
arch/mips/basler/excite/Makefile
View File

@ -1,8 +0,0 @@
#
# Makefile for Basler eXcite
#
obj-$(CONFIG_BASLER_EXCITE) += excite_irq.o excite_prom.o excite_setup.o \
excite_device.o excite_procfs.o
obj-m += excite_iodev.o

403
arch/mips/basler/excite/excite_device.c
View File

@ -1,403 +0,0 @@
/*
* Copyright (C) 2004 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/err.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <asm/types.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
#include <rm9k_eth.h>
#include <rm9k_wdt.h>
#include <rm9k_xicap.h>
#include <excite_nandflash.h>
#include "excite_iodev.h"
#define RM9K_GE_UNIT 0
#define XICAP_UNIT 0
#define NAND_UNIT 0
#define DLL_TIMEOUT 3 /* seconds */
#define RINIT(__start__, __end__, __name__, __parent__) { \
.name = __name__ "_0", \
.start = (__start__), \
.end = (__end__), \
.flags = 0, \
.parent = (__parent__) \
}
#define RINIT_IRQ(__irq__, __name__) { \
.name = __name__ "_0", \
.start = (__irq__), \
.end = (__irq__), \
.flags = IORESOURCE_IRQ, \
.parent = NULL \
}
enum {
slice_xicap,
slice_eth
};
static struct resource
excite_ctr_resource __maybe_unused = {
.name = "GPI counters",
.start = 0,
.end = 5,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_gpislice_resource __maybe_unused = {
.name = "GPI slices",
.start = 0,
.end = 1,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_mdio_channel_resource __maybe_unused = {
.name = "MDIO channels",
.start = 0,
.end = 1,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_fifomem_resource __maybe_unused = {
.name = "FIFO memory",
.start = 0,
.end = 767,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_scram_resource __maybe_unused = {
.name = "Scratch RAM",
.start = EXCITE_PHYS_SCRAM,
.end = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_fpga_resource __maybe_unused = {
.name = "System FPGA",
.start = EXCITE_PHYS_FPGA,
.end = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_nand_resource __maybe_unused = {
.name = "NAND flash control",
.start = EXCITE_PHYS_NAND,
.end = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_titan_resource __maybe_unused = {
.name = "TITAN registers",
.start = EXCITE_PHYS_TITAN,
.end = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
};
static void adjust_resources(struct resource *res, unsigned int n)
{
struct resource *p;
const unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA;
for (p = res; p < res + n; p++) {
const struct resource * const parent = p->parent;
if (parent) {
p->start += parent->start;
p->end += parent->start;
p->flags = parent->flags & mask;
}
}
}
#if defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE)
static struct resource xicap_rsrc[] = {
RINIT(0x4840, 0x486f, XICAP_RESOURCE_FIFO_RX, &excite_titan_resource),
RINIT(0x4940, 0x494b, XICAP_RESOURCE_FIFO_TX, &excite_titan_resource),
RINIT(0x5040, 0x5127, XICAP_RESOURCE_XDMA, &excite_titan_resource),
RINIT(0x1000, 0x112f, XICAP_RESOURCE_PKTPROC, &excite_titan_resource),
RINIT(0x1100, 0x110f, XICAP_RESOURCE_PKT_STREAM, &excite_fpga_resource),
RINIT(0x0800, 0x0bff, XICAP_RESOURCE_DMADESC, &excite_scram_resource),
RINIT(slice_xicap, slice_xicap, XICAP_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
RINIT(0x0100, 0x02ff, XICAP_RESOURCE_FIFO_BLK, &excite_fifomem_resource),
RINIT_IRQ(TITAN_IRQ, XICAP_RESOURCE_IRQ)
};
static struct platform_device xicap_pdev = {
.name = XICAP_NAME,
.id = XICAP_UNIT,
.num_resources = ARRAY_SIZE(xicap_rsrc),
.resource = xicap_rsrc
};
/*
* Create a platform device for the GPI port that receives the
* image data from the embedded camera.
*/
static int __init xicap_devinit(void)
{
unsigned long tend;
u32 reg;
int retval;
adjust_resources(xicap_rsrc, ARRAY_SIZE(xicap_rsrc));
/* Power up the slice and configure it. */
reg = titan_readl(CPTC1R);
reg &= ~(0x11100 << slice_xicap);
titan_writel(reg, CPTC1R);
/* Enable slice & DLL. */
reg= titan_readl(CPRR);
reg &= ~(0x00030003 << (slice_xicap * 2));
titan_writel(reg, CPRR);
/* Wait for DLLs to lock */
tend = jiffies + DLL_TIMEOUT * HZ;
while (time_before(jiffies, tend)) {
if (!(~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))))
break;
yield();
}
if (~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))) {
printk(KERN_ERR "%s: DLL not locked after %u seconds\n",
xicap_pdev.name, DLL_TIMEOUT);
retval = -ETIME;
} else {
/* Register platform device */
retval = platform_device_register(&xicap_pdev);
}
return retval;
}
device_initcall(xicap_devinit);
#endif /* defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE) */
#if defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE)
static struct resource wdt_rsrc[] = {
RINIT(0, 0, WDT_RESOURCE_COUNTER, &excite_ctr_resource),
RINIT(0x0084, 0x008f, WDT_RESOURCE_REGS, &excite_titan_resource),
RINIT_IRQ(TITAN_IRQ, WDT_RESOURCE_IRQ)
};
static struct platform_device wdt_pdev = {
.name = WDT_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(wdt_rsrc),
.resource = wdt_rsrc
};
/*
* Create a platform device for the GPI port that receives the
* image data from the embedded camera.
*/
static int __init wdt_devinit(void)
{
adjust_resources(wdt_rsrc, ARRAY_SIZE(wdt_rsrc));
return platform_device_register(&wdt_pdev);
}
device_initcall(wdt_devinit);
#endif /* defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE) */
static struct resource excite_nandflash_rsrc[] = {
RINIT(0x2000, 0x201f, EXCITE_NANDFLASH_RESOURCE_REGS, &excite_nand_resource)
};
static struct platform_device excite_nandflash_pdev = {
.name = "excite_nand",
.id = NAND_UNIT,
.num_resources = ARRAY_SIZE(excite_nandflash_rsrc),
.resource = excite_nandflash_rsrc
};
/*
* Create a platform device for the access to the nand-flash
* port
*/
static int __init excite_nandflash_devinit(void)
{
adjust_resources(excite_nandflash_rsrc, ARRAY_SIZE(excite_nandflash_rsrc));
/* nothing to be done here */
/* Register platform device */
return platform_device_register(&excite_nandflash_pdev);
}
device_initcall(excite_nandflash_devinit);
static struct resource iodev_rsrc[] = {
RINIT_IRQ(FPGA1_IRQ, IODEV_RESOURCE_IRQ)
};
static struct platform_device io_pdev = {
.name = IODEV_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(iodev_rsrc),
.resource = iodev_rsrc
};
/*
* Create a platform device for the external I/O ports.
*/
static int __init io_devinit(void)
{
adjust_resources(iodev_rsrc, ARRAY_SIZE(iodev_rsrc));
return platform_device_register(&io_pdev);
}
device_initcall(io_devinit);
#if defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE)
static struct resource rm9k_ge_rsrc[] = {
RINIT(0x2200, 0x27ff, RM9K_GE_RESOURCE_MAC, &excite_titan_resource),
RINIT(0x1800, 0x1fff, RM9K_GE_RESOURCE_MSTAT, &excite_titan_resource),
RINIT(0x2000, 0x212f, RM9K_GE_RESOURCE_PKTPROC, &excite_titan_resource),
RINIT(0x5140, 0x5227, RM9K_GE_RESOURCE_XDMA, &excite_titan_resource),
RINIT(0x4870, 0x489f, RM9K_GE_RESOURCE_FIFO_RX, &excite_titan_resource),
RINIT(0x494c, 0x4957, RM9K_GE_RESOURCE_FIFO_TX, &excite_titan_resource),
RINIT(0x0000, 0x007f, RM9K_GE_RESOURCE_FIFOMEM_RX, &excite_fifomem_resource),
RINIT(0x0080, 0x00ff, RM9K_GE_RESOURCE_FIFOMEM_TX, &excite_fifomem_resource),
RINIT(0x0180, 0x019f, RM9K_GE_RESOURCE_PHY, &excite_titan_resource),
RINIT(0x0000, 0x03ff, RM9K_GE_RESOURCE_DMADESC_RX, &excite_scram_resource),
RINIT(0x0400, 0x07ff, RM9K_GE_RESOURCE_DMADESC_TX, &excite_scram_resource),
RINIT(slice_eth, slice_eth, RM9K_GE_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
RINIT(0, 0, RM9K_GE_RESOURCE_MDIO_CHANNEL, &excite_mdio_channel_resource),
RINIT_IRQ(TITAN_IRQ, RM9K_GE_RESOURCE_IRQ_MAIN),
RINIT_IRQ(PHY_IRQ, RM9K_GE_RESOURCE_IRQ_PHY)
};
static struct platform_device rm9k_ge_pdev = {
.name = RM9K_GE_NAME,
.id = RM9K_GE_UNIT,
.num_resources = ARRAY_SIZE(rm9k_ge_rsrc),
.resource = rm9k_ge_rsrc
};
/*
* Create a platform device for the Ethernet port.
*/
static int __init rm9k_ge_devinit(void)
{
u32 reg;
adjust_resources(rm9k_ge_rsrc, ARRAY_SIZE(rm9k_ge_rsrc));
/* Power up the slice and configure it. */
reg = titan_readl(CPTC1R);
reg &= ~(0x11000 << slice_eth);
reg |= 0x100 << slice_eth;
titan_writel(reg, CPTC1R);
/* Take the MAC out of reset, reset the DLLs. */
reg = titan_readl(CPRR);
reg &= ~(0x00030000 << (slice_eth * 2));
reg |= 0x3 << (slice_eth * 2);
titan_writel(reg, CPRR);
return platform_device_register(&rm9k_ge_pdev);
}
device_initcall(rm9k_ge_devinit);
#endif /* defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE) */
static int __init excite_setup_devs(void)
{
int res;
u32 reg;
/* Enable xdma and fifo interrupts */
reg = titan_readl(0x0050);
titan_writel(reg | 0x18000000, 0x0050);
res = request_resource(&iomem_resource, &excite_titan_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_scram_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_fpga_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_nand_resource);
if (res)
return res;
excite_fpga_resource.flags = excite_fpga_resource.parent->flags &
( IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA);
excite_nand_resource.flags = excite_nand_resource.parent->flags &
( IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA);
return 0;
}
arch_initcall(excite_setup_devs);

178
arch/mips/basler/excite/excite_iodev.c
View File

@ -1,178 +0,0 @@
/*
* Copyright (C) 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/compiler.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/wait.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/miscdevice.h>
#include <linux/smp_lock.h>
#include "excite_iodev.h"
static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int);
static int __init iodev_probe(struct platform_device *);
static int __exit iodev_remove(struct platform_device *);
static int iodev_open(struct inode *, struct file *);
static int iodev_release(struct inode *, struct file *);
static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
static unsigned int iodev_poll(struct file *, struct poll_table_struct *);
static irqreturn_t iodev_irqhdl(int, void *);
static const char iodev_name[] = "iodev";
static unsigned int iodev_irq;
static DECLARE_WAIT_QUEUE_HEAD(wq);
static const struct file_operations fops =
{
.owner = THIS_MODULE,
.open = iodev_open,
.release = iodev_release,
.read = iodev_read,
.poll = iodev_poll
};
static struct miscdevice miscdev =
{
.minor = MISC_DYNAMIC_MINOR,
.name = iodev_name,
.fops = &fops
};
static struct platform_driver iodev_driver = {
.driver = {
.name = iodev_name,
.owner = THIS_MODULE,
},
.probe = iodev_probe,
.remove = __devexit_p(iodev_remove),
};
static const struct resource *
iodev_get_resource(struct platform_device *pdv, const char *name,
unsigned int type)
{
char buf[80];
if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf)
return NULL;
return platform_get_resource_byname(pdv, type, buf);
}
/* No hotplugging on the platform bus - use __init */
static int __init iodev_probe(struct platform_device *dev)
{
const struct resource * const ri =
iodev_get_resource(dev, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
if (unlikely(!ri))
return -ENXIO;
iodev_irq = ri->start;
return misc_register(&miscdev);
}
static int __exit iodev_remove(struct platform_device *dev)
{
return misc_deregister(&miscdev);
}
static int iodev_open(struct inode *i, struct file *f)
{
int ret;
ret = request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
iodev_name, &miscdev);
return ret;
}
static int iodev_release(struct inode *i, struct file *f)
{
free_irq(iodev_irq, &miscdev);
return 0;
}
static ssize_t
iodev_read(struct file *f, char __user *d, size_t s, loff_t *o)
{
ssize_t ret;
DEFINE_WAIT(w);
prepare_to_wait(&wq, &w, TASK_INTERRUPTIBLE);
if (!signal_pending(current))
schedule();
ret = signal_pending(current) ? -ERESTARTSYS : 0;
finish_wait(&wq, &w);
return ret;
}
static unsigned int iodev_poll(struct file *f, struct poll_table_struct *p)
{
poll_wait(f, &wq, p);
return POLLOUT | POLLWRNORM;
}
static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
{
wake_up(&wq);
return IRQ_HANDLED;
}
static int __init iodev_init_module(void)
{
return platform_driver_register(&iodev_driver);
}
static void __exit iodev_cleanup_module(void)
{
platform_driver_unregister(&iodev_driver);
}
module_init(iodev_init_module);
module_exit(iodev_cleanup_module);
MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
MODULE_DESCRIPTION("Basler eXcite i/o interrupt handler");
MODULE_VERSION("0.0");
MODULE_LICENSE("GPL");

10
arch/mips/basler/excite/excite_iodev.h
View File

@ -1,10 +0,0 @@
#ifndef __EXCITE_IODEV_H__
#define __EXCITE_IODEV_H__
/* Device name */
#define IODEV_NAME "iodev"
/* Resource names */
#define IODEV_RESOURCE_IRQ "excite_iodev_irq"
#endif /* __EXCITE_IODEV_H__ */

122
arch/mips/basler/excite/excite_irq.c
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@ -1,122 +0,0 @@
/*
* Copyright (C) by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslereb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
extern asmlinkage void excite_handle_int(void);
/*
* Initialize the interrupt handler
*/
void __init arch_init_irq(void)
{
mips_cpu_irq_init();
rm7k_cpu_irq_init();
rm9k_cpu_irq_init();
}
asmlinkage void plat_irq_dispatch(void)
{
const u32
interrupts = read_c0_cause() >> 8,
mask = ((read_c0_status() >> 8) & 0x000000ff) |
(read_c0_intcontrol() & 0x0000ff00),
pending = interrupts & mask;
u32 msgintflags, msgintmask, msgint;
/* process timer interrupt */
if (pending & (1 << TIMER_IRQ)) {
do_IRQ(TIMER_IRQ);
return;
}
/* Process PCI interrupts */
#if USB_IRQ < 10
msgintflags = ocd_readl(INTP0Status0 + (USB_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (USB_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (USB_MSGINT % 0x20));
if ((pending & (1 << USB_IRQ)) && msgint) {
#else
if (pending & (1 << USB_IRQ)) {
#endif
do_IRQ(USB_IRQ);
return;
}
/* Process TITAN interrupts */
msgintflags = ocd_readl(INTP0Status0 + (TITAN_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (TITAN_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20));
if ((pending & (1 << TITAN_IRQ)) && msgint) {
ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
do_IRQ(TITAN_IRQ);
return;
}
/* Process FPGA line #0 interrupts */
msgintflags = ocd_readl(INTP0Status0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
if ((pending & (1 << FPGA0_IRQ)) && msgint) {
do_IRQ(FPGA0_IRQ);
return;
}
/* Process FPGA line #1 interrupts */
msgintflags = ocd_readl(INTP0Status0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
if ((pending & (1 << FPGA1_IRQ)) && msgint) {
do_IRQ(FPGA1_IRQ);
return;
}
/* Process PHY interrupts */
msgintflags = ocd_readl(INTP0Status0 + (PHY_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
if ((pending & (1 << PHY_IRQ)) && msgint) {
do_IRQ(PHY_IRQ);
return;
}
/* Process spurious interrupts */
spurious_interrupt();
}

92
arch/mips/basler/excite/excite_procfs.c
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@ -1,92 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* Procfs support for Basler eXcite
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/stat.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
static int excite_unit_id_proc_show(struct seq_file *m, void *v)
{
seq_printf(m, "%06x", unit_id);
return 0;
}
static int excite_unit_id_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, excite_unit_id_proc_show, NULL);
}
static const struct file_operations excite_unit_id_proc_fops = {
.owner = THIS_MODULE,
.open = excite_unit_id_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int
excite_bootrom_read(char *page, char **start, off_t off, int count,
int *eof, void *data)
{
void __iomem * src;
if (off >= EXCITE_SIZE_BOOTROM) {
*eof = 1;
return 0;
}
if ((off + count) > EXCITE_SIZE_BOOTROM)
count = EXCITE_SIZE_BOOTROM - off;
src = ioremap(EXCITE_PHYS_BOOTROM + off, count);
if (src) {
memcpy_fromio(page, src, count);
iounmap(src);
*start = page;
} else {
count = -ENOMEM;
}
return count;
}
void excite_procfs_init(void)
{
/* Create & populate /proc/excite */
struct proc_dir_entry * const pdir = proc_mkdir("excite", NULL);
if (pdir) {
struct proc_dir_entry * e;
e = proc_create("unit_id", S_IRUGO, pdir,
&excite_unit_id_proc_fops);
if (e) e->size = 6;
e = create_proc_read_entry("bootrom", S_IRUGO, pdir,
excite_bootrom_read, NULL);
if (e) e->size = EXCITE_SIZE_BOOTROM;
}
}

144
arch/mips/basler/excite/excite_prom.c
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@ -1,144 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Thomas Koeller (thomas.koeller@baslerweb.com)
* Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
* Manish Lachwani.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/smp.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/string.h>
#include <excite.h>
/* This struct is used by Redboot to pass arguments to the kernel */
typedef struct
{
char *name;
char *val;
} t_env_var;
struct parmblock {
t_env_var memsize;
t_env_var modetty0;
t_env_var ethaddr;
t_env_var env_end;
char *argv[2];
char text[0];
};
static unsigned int prom_argc;
static const char ** prom_argv;
static const t_env_var * prom_env;
static void prom_halt(void) __attribute__((noreturn));
static void prom_exit(void) __attribute__((noreturn));
const char *get_system_type(void)
{
return "Basler eXcite";
}
/*
* Halt the system
*/
static void prom_halt(void)
{
printk(KERN_NOTICE "\n** System halted.\n");
while (1)
asm volatile (
"\t.set\tmips3\n"
"\twait\n"
"\t.set\tmips0\n"
);
}
/*
* Reset the CPU and re-enter Redboot
*/
static void prom_exit(void)
{
unsigned int i;
volatile unsigned char * const flg =
(volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_DPR);
/* Clear the watchdog reset flag, set the reboot flag */
*flg &= ~0x01;
*flg |= 0x80;
for (i = 0; i < 10; i++) {
*(volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_SYSCTL) = 0x02;
iob();
mdelay(1000);
}
printk(KERN_NOTICE "Reset failed\n");
prom_halt();
}
static const char __init *prom_getenv(char *name)
{
const t_env_var * p;
for (p = prom_env; p->name != NULL; p++)
if(strcmp(name, p->name) == 0)
break;
return p->val;
}
/*
* Init routine which accepts the variables from Redboot
*/
void __init prom_init(void)
{
const struct parmblock * const pb = (struct parmblock *) fw_arg2;
prom_argc = fw_arg0;
prom_argv = (const char **) fw_arg1;
prom_env = &pb->memsize;
/* Callbacks for halt, restart */
_machine_restart = (void (*)(char *)) prom_exit;
_machine_halt = prom_halt;
#ifdef CONFIG_32BIT
/* copy command line */
strcpy(arcs_cmdline, prom_argv[1]);
memsize = simple_strtol(prom_getenv("memsize"), NULL, 16);
strcpy(modetty, prom_getenv("modetty0"));
#endif /* CONFIG_32BIT */
#ifdef CONFIG_64BIT
# error 64 bit support not implemented
#endif /* CONFIG_64BIT */
}
/* This is called from free_initmem(), so we need to provide it */
void __init prom_free_prom_memory(void)
{
/* Nothing to do */
}

302
arch/mips/basler/excite/excite_setup.c
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@ -1,302 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
* Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
* Manish Lachwani.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/pgtable-32.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
#define TITAN_UART_CLK 25000000
#if 1
/* normal serial port assignment */
#define REGBASE_SER0 0x0208
#define REGBASE_SER1 0x0238
#define MASK_SER0 0x1
#define MASK_SER1 0x2
#else
/* serial ports swapped */
#define REGBASE_SER0 0x0238
#define REGBASE_SER1 0x0208
#define MASK_SER0 0x2
#define MASK_SER1 0x1
#endif
unsigned long memsize;
char modetty[30];
unsigned int titan_irq = TITAN_IRQ;
static void __iomem * ctl_regs;
u32 unit_id;
volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
/* Protect access to shared GPI registers */
DEFINE_SPINLOCK(titan_lock);
int titan_irqflags;
/*
* The eXcite platform uses the alternate timer interrupt
*
* Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how
* to handle the alternate timer interrupt of the RM9000.
*/
void __init plat_time_init(void)
{
const u32 modebit5 = ocd_readl(0x00e4);
unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2;
unsigned int div = ((modebit5 >> 16) & 0x1f) + 2;
if (div == 33)
div = 1;
mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2;
}
static int __init excite_init_console(void)
{
#if defined(CONFIG_SERIAL_8250)
static __initdata char serr[] =
KERN_ERR "Serial port #%u setup failed\n";
struct uart_port up;
/* Take the DUART out of reset */
titan_writel(0x00ff1cff, CPRR);
#if (CONFIG_SERIAL_8250_NR_UARTS > 1)
/* Enable both ports */
titan_writel(MASK_SER0 | MASK_SER1, UACFG);
#else
/* Enable port #0 only */
titan_writel(MASK_SER0, UACFG);
#endif
/*
* Set up serial port #0. Do not use autodetection; the result is
* not what we want.
*/
memset(&up, 0, sizeof(up));
up.membase = (char *) titan_addr(REGBASE_SER0);
up.irq = TITAN_IRQ;
up.uartclk = TITAN_UART_CLK;
up.regshift = 0;
up.iotype = UPIO_RM9000;
up.type = PORT_RM9000;
up.flags = UPF_SHARE_IRQ;
up.line = 0;
if (early_serial_setup(&up))
printk(serr, up.line);
#if CONFIG_SERIAL_8250_NR_UARTS > 1
/* And now for port #1. */
up.membase = (char *) titan_addr(REGBASE_SER1);
up.line = 1;
if (early_serial_setup(&up))
printk(serr, up.line);
#endif /* CONFIG_SERIAL_8250_NR_UARTS > 1 */
#else
/* Leave the DUART in reset */
titan_writel(0x00ff3cff, CPRR);
#endif /* defined(CONFIG_SERIAL_8250) */
return 0;
}
static int __init excite_platform_init(void)
{
unsigned int i;
unsigned char buf[3];
u8 reg;
void __iomem * dpr;
/* BIU buffer allocations */
ocd_writel(8, CPURSLMT); /* CPU */
titan_writel(4, CPGRWL); /* GPI / Ethernet */
/* Map control registers located in FPGA */
ctl_regs = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_SYSCTL, 16);
if (!ctl_regs)
panic("eXcite: failed to map platform control registers\n");
memcpy_fromio(buf, ctl_regs + 2, ARRAY_SIZE(buf));
unit_id = buf[0] | (buf[1] << 8) | (buf[2] << 16);
/* Clear the reboot flag */
dpr = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_DPR, 1);
reg = __raw_readb(dpr);
__raw_writeb(reg & 0x7f, dpr);
iounmap(dpr);
/* Interrupt controller setup */
for (i = INTP0Status0; i < INTP0Status0 + 0x80; i += 0x10) {
ocd_writel(0x00000000, i + 0x04);
ocd_writel(0xffffffff, i + 0x0c);
}
ocd_writel(0x2, NMICONFIG);
ocd_writel(0x1 << (TITAN_MSGINT % 0x20),
INTP0Mask0 + (0x10 * (TITAN_MSGINT / 0x20)));
ocd_writel((0x1 << (FPGA0_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20)));
ocd_writel((0x1 << (FPGA1_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20)));
ocd_writel((0x1 << (PHY_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20)));
#if USB_IRQ < 10
ocd_writel((0x1 << (USB_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20)));
#endif
/* Enable the packet FIFO, XDMA and XDMA arbiter */
titan_writel(0x00ff18ff, CPRR);
/*
* Set up the PADMUX. Power down all ethernet slices,
* they will be powered up and configured at device startup.
*/
titan_writel(0x00878206, CPTC1R);
titan_writel(0x00001100, CPTC0R); /* latch PADMUX, enable WCIMODE */
/* Reset and enable the FIFO block */
titan_writel(0x00000001, SDRXFCIE);
titan_writel(0x00000001, SDTXFCIE);
titan_writel(0x00000100, SDRXFCIE);
titan_writel(0x00000000, SDTXFCIE);
/*
* Initialize the common interrupt shared by all components of
* the GPI/Ethernet subsystem.
*/
titan_writel((EXCITE_PHYS_OCD >> 12), CPCFG0);
titan_writel(TITAN_MSGINT, CPCFG1);
/*
* XDMA configuration.
* In order for the XDMA to be sharable among multiple drivers,
* the setup must be done here in the platform. The reason is that
* this setup can only be done while the XDMA is in reset. If this
* were done in a driver, it would interrupt all other drivers
* using the XDMA.
*/
titan_writel(0x80021dff, GXCFG); /* XDMA reset */
titan_writel(0x00000000, CPXCISRA);
titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */
#if defined(CONFIG_HIGHMEM)
# error change for HIGHMEM support!
#else
titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */
#endif
titan_writel(0, GXDMA_DESCADR);
for (i = 0x5040; i <= 0x5300; i += 0x0040)
titan_writel(0x80080000, i); /* reset channel */
titan_writel((0x1 << 29) /* no sparse tx descr. */
| (0x1 << 28) /* no sparse rx descr. */
| (0x1 << 23) | (0x1 << 24) /* descriptor coherency */
| (0x1 << 21) | (0x1 << 22) /* data coherency */
| (0x1 << 17)
| 0x1dff,
GXCFG);
#if defined(CONFIG_SMP)
# error No SMP support
#else
/* All interrupts go to core #0 only. */
titan_writel(0x1f007fff, CPDST0A);
titan_writel(0x00000000, CPDST0B);
titan_writel(0x0000ff3f, CPDST1A);
titan_writel(0x00000000, CPDST1B);
titan_writel(0x00ffffff, CPXDSTA);
titan_writel(0x00000000, CPXDSTB);
#endif
/* Enable DUART interrupts, disable everything else. */
titan_writel(0x04000000, CPGIG0ER);
titan_writel(0x000000c0, CPGIG1ER);
excite_procfs_init();
return 0;
}
void __init plat_mem_setup(void)
{
volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000;
/* Announce RAM to system */
add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
/* Set up the peripheral address map */
*(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
wmb();
*(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
wmb();
ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
ocd_writel(((EXCITE_SIZE_TITAN >> 4) & 0x7fffff00) - 0x100, LKM5);
ocd_writel((EXCITE_PHYS_SCRAM >> 4) | 0x1UL, LKB13);
ocd_writel(((EXCITE_SIZE_SCRAM >> 4) & 0xffffff00) - 0x100, LKM13);
/* Local bus slot #0 */
ocd_writel(0x00040510, LDP0);
ocd_writel((EXCITE_PHYS_BOOTROM >> 4) | 0x1UL, LKB9);
ocd_writel(((EXCITE_SIZE_BOOTROM >> 4) & 0x03ffff00) - 0x100, LKM9);
/* Local bus slot #2 */
ocd_writel(0x00000330, LDP2);
ocd_writel((EXCITE_PHYS_FPGA >> 4) | 0x1, LKB11);
ocd_writel(((EXCITE_SIZE_FPGA >> 4) - 0x100) & 0x03ffff00, LKM11);
/* Local bus slot #3 */
ocd_writel(0x00123413, LDP3);
ocd_writel((EXCITE_PHYS_NAND >> 4) | 0x1, LKB12);
ocd_writel(((EXCITE_SIZE_NAND >> 4) - 0x100) & 0x03ffff00, LKM12);
}
console_initcall(excite_init_console);
arch_initcall(excite_platform_init);
EXPORT_SYMBOL(titan_lock);
EXPORT_SYMBOL(titan_irqflags);
EXPORT_SYMBOL(titan_irq);
EXPORT_SYMBOL(ocd_base);
EXPORT_SYMBOL(titan_base);

10
arch/mips/bcm47xx/prom.c
View File

@ -100,11 +100,11 @@ static __init void prom_init_console(void)
static __init void prom_init_cmdline(void)
{
static char buf[CL_SIZE] __initdata;
static char buf[COMMAND_LINE_SIZE] __initdata;
/* Get the kernel command line from CFE */
if (cfe_getenv("LINUX_CMDLINE", buf, CL_SIZE) >= 0) {
buf[CL_SIZE-1] = 0;
if (cfe_getenv("LINUX_CMDLINE", buf, COMMAND_LINE_SIZE) >= 0) {
buf[COMMAND_LINE_SIZE - 1] = 0;
strcpy(arcs_cmdline, buf);
}
@ -112,13 +112,13 @@ static __init void prom_init_cmdline(void)
* as CFE is not available anymore later in the boot process. */
if ((strstr(arcs_cmdline, "console=")) == NULL) {
/* Try to read the default serial port used by CFE */
if ((cfe_getenv("BOOT_CONSOLE", buf, CL_SIZE) < 0)
if ((cfe_getenv("BOOT_CONSOLE", buf, COMMAND_LINE_SIZE) < 0)
|| (strncmp("uart", buf, 4)))
/* Default to uart0 */
strcpy(buf, "uart0");
/* Compute the new command line */
snprintf(arcs_cmdline, CL_SIZE, "%s console=ttyS%c,115200",
snprintf(arcs_cmdline, COMMAND_LINE_SIZE, "%s console=ttyS%c,115200",
arcs_cmdline, buf[4]);
}
}

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