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OMAP2PLUS: DSS2: Remove hack config "CONFIG_OMAP2_DSS_USE_DSI_PLL"
The clock sources for DISPC_FCLK and LCD1_CLK are now specified in the board file. There is no need for the hack config "CONFIG_OMAP2_DSS_USE_DSI_PLL" anymore. Introduce function dpi_use_dsi_pll() which checks for the clock sources to decide whether DSI PLL is to be used or not. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -90,14 +90,6 @@ config OMAP2_DSS_DSI
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See http://www.mipi.org/ for DSI spesifications.
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See http://www.mipi.org/ for DSI spesifications.
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config OMAP2_DSS_USE_DSI_PLL
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bool "Use DSI PLL for PCLK (EXPERIMENTAL)"
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default n
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depends on OMAP2_DSS_DSI
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help
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Use DSI PLL to generate pixel clock. Currently only for DPI output.
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DSI PLL can be used to generate higher and more precise pixel clocks.
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config OMAP2_DSS_FAKE_VSYNC
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config OMAP2_DSS_FAKE_VSYNC
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bool "Fake VSYNC irq from manual update displays"
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bool "Fake VSYNC irq from manual update displays"
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default n
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default n
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@ -39,7 +39,17 @@ static struct {
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struct regulator *vdds_dsi_reg;
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struct regulator *vdds_dsi_reg;
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} dpi;
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} dpi;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
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{
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if (dssdev->clocks.dispc.dispc_fclk_src ==
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OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
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dssdev->clocks.dispc.channel.lcd_clk_src ==
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OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)
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return true;
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else
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return false;
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}
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static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
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static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
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unsigned long pck_req, unsigned long *fck, int *lck_div,
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unsigned long pck_req, unsigned long *fck, int *lck_div,
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int *pck_div)
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int *pck_div)
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@ -69,7 +79,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
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return 0;
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return 0;
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}
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}
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#else
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static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
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static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
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unsigned long pck_req, unsigned long *fck, int *lck_div,
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unsigned long pck_req, unsigned long *fck, int *lck_div,
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int *pck_div)
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int *pck_div)
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@ -96,13 +106,12 @@ static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
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return 0;
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return 0;
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}
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}
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#endif
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static int dpi_set_mode(struct omap_dss_device *dssdev)
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static int dpi_set_mode(struct omap_dss_device *dssdev)
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{
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{
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struct omap_video_timings *t = &dssdev->panel.timings;
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struct omap_video_timings *t = &dssdev->panel.timings;
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int lck_div, pck_div;
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int lck_div = 0, pck_div = 0;
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unsigned long fck;
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unsigned long fck = 0;
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unsigned long pck;
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unsigned long pck;
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bool is_tft;
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bool is_tft;
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int r = 0;
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int r = 0;
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@ -114,13 +123,12 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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if (dpi_use_dsi_pll(dssdev))
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r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
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r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
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&lck_div, &pck_div);
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&fck, &lck_div, &pck_div);
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#else
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else
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r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
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r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
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&lck_div, &pck_div);
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&fck, &lck_div, &pck_div);
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#endif
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if (r)
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if (r)
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goto err0;
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goto err0;
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@ -179,12 +187,13 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
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if (r)
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if (r)
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goto err2;
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goto err2;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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if (dpi_use_dsi_pll(dssdev)) {
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dss_clk_enable(DSS_CLK_SYSCK);
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dss_clk_enable(DSS_CLK_SYSCK);
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r = dsi_pll_init(dssdev, 0, 1);
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r = dsi_pll_init(dssdev, 0, 1);
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if (r)
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if (r)
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goto err3;
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goto err3;
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#endif
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}
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r = dpi_set_mode(dssdev);
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r = dpi_set_mode(dssdev);
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if (r)
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if (r)
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goto err4;
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goto err4;
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@ -196,11 +205,11 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
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return 0;
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return 0;
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err4:
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err4:
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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if (dpi_use_dsi_pll(dssdev))
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dsi_pll_uninit();
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dsi_pll_uninit();
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err3:
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err3:
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dss_clk_disable(DSS_CLK_SYSCK);
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if (dpi_use_dsi_pll(dssdev))
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#endif
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dss_clk_disable(DSS_CLK_SYSCK);
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err2:
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err2:
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
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if (cpu_is_omap34xx())
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if (cpu_is_omap34xx())
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@ -216,11 +225,11 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
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{
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{
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dssdev->manager->disable(dssdev->manager);
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dssdev->manager->disable(dssdev->manager);
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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if (dpi_use_dsi_pll(dssdev)) {
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dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dsi_pll_uninit();
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dsi_pll_uninit();
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dss_clk_disable(DSS_CLK_SYSCK);
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dss_clk_disable(DSS_CLK_SYSCK);
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#endif
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}
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
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@ -251,6 +260,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
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int lck_div, pck_div;
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int lck_div, pck_div;
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unsigned long fck;
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unsigned long fck;
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unsigned long pck;
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unsigned long pck;
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struct dispc_clock_info dispc_cinfo;
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if (!dispc_lcd_timings_ok(timings))
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if (!dispc_lcd_timings_ok(timings))
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return -EINVAL;
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return -EINVAL;
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@ -260,10 +270,8 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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if (dpi_use_dsi_pll(dssdev)) {
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{
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struct dsi_clock_info dsi_cinfo;
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struct dsi_clock_info dsi_cinfo;
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struct dispc_clock_info dispc_cinfo;
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r = dsi_pll_calc_clock_div_pck(is_tft,
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r = dsi_pll_calc_clock_div_pck(is_tft,
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timings->pixel_clock * 1000,
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timings->pixel_clock * 1000,
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&dsi_cinfo, &dispc_cinfo);
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&dsi_cinfo, &dispc_cinfo);
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@ -272,13 +280,8 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
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return r;
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return r;
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fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
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fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
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lck_div = dispc_cinfo.lck_div;
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} else {
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pck_div = dispc_cinfo.pck_div;
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}
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#else
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{
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struct dss_clock_info dss_cinfo;
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
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r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
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&dss_cinfo, &dispc_cinfo);
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&dss_cinfo, &dispc_cinfo);
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@ -286,10 +289,10 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
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return r;
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return r;
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fck = dss_cinfo.fck;
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fck = dss_cinfo.fck;
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lck_div = dispc_cinfo.lck_div;
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pck_div = dispc_cinfo.pck_div;
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}
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}
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#endif
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lck_div = dispc_cinfo.lck_div;
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pck_div = dispc_cinfo.pck_div;
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pck = fck / lck_div / pck_div / 1000;
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pck = fck / lck_div / pck_div / 1000;
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@ -1417,12 +1417,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,
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DSSDBG("PLL init\n");
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DSSDBG("PLL init\n");
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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/*
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* HACK: this is just a quick hack to get the USE_DSI_PLL
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* option working. USE_DSI_PLL is itself a big hack, and
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* should be removed.
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*/
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if (dsi.vdds_dsi_reg == NULL) {
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if (dsi.vdds_dsi_reg == NULL) {
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struct regulator *vdds_dsi;
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struct regulator *vdds_dsi;
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@ -1435,7 +1429,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,
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dsi.vdds_dsi_reg = vdds_dsi;
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dsi.vdds_dsi_reg = vdds_dsi;
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}
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}
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#endif
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enable_clocks(1);
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enable_clocks(1);
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dsi_enable_pll_clock(1);
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dsi_enable_pll_clock(1);
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