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MIPS: Optimize TLB refill for RI/XI configurations.
We don't have to do a separate shift to eliminate the software bits, just rotate them into the fill and they will be ignored. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4294/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -599,8 +599,7 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
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unsigned int reg)
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{
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if (cpu_has_rixi) {
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UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL));
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} else {
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#ifdef CONFIG_64BIT_PHYS_ADDR
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uasm_i_dsrl_safe(p, reg, reg, ilog2(_PAGE_GLOBAL));
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@ -1019,11 +1018,9 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
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uasm_i_ld(p, tmp, 0, ptep); /* get even pte */
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uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
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if (cpu_has_rixi) {
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UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
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UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL));
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL));
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} else {
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uasm_i_dsrl_safe(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); /* convert to entrylo0 */
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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@ -1046,13 +1043,11 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
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if (r45k_bvahwbug())
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build_tlb_probe_entry(p);
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if (cpu_has_rixi) {
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UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
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UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL));
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if (r4k_250MHZhwbug())
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UASM_i_MTC0(p, 0, C0_ENTRYLO0);
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UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
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UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL));
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} else {
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UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); /* convert to entrylo0 */
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if (r4k_250MHZhwbug())
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@ -1212,13 +1207,9 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
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UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
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}
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if (cpu_has_rixi) {
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uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
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uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
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uasm_i_drotr(p, even, even,
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ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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uasm_i_drotr(p, even, even, ilog2(_PAGE_GLOBAL));
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UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
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uasm_i_drotr(p, odd, odd,
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ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
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uasm_i_drotr(p, odd, odd, ilog2(_PAGE_GLOBAL));
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} else {
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uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_GLOBAL));
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UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
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