mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-21 11:44:01 +08:00
Merge branches 'devel-omap1' and 'devel-omap2plus' into omap-for-linus
This commit is contained in:
commit
73c5ef126f
@ -16,9 +16,12 @@
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#include <linux/init.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/leds.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <media/soc_camera.h>
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#include <asm/serial.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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@ -32,6 +35,7 @@
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#include <plat/usb.h>
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#include <plat/board.h>
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#include <plat/common.h>
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#include <mach/camera.h>
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#include <mach/ams-delta-fiq.h>
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@ -213,10 +217,56 @@ static struct platform_device ams_delta_led_device = {
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.id = -1
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};
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static struct i2c_board_info ams_delta_camera_board_info[] = {
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{
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I2C_BOARD_INFO("ov6650", 0x60),
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},
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};
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#ifdef CONFIG_LEDS_TRIGGERS
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DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger);
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static int ams_delta_camera_power(struct device *dev, int power)
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{
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/*
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* turn on camera LED
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*/
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if (power)
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led_trigger_event(ams_delta_camera_led_trigger, LED_FULL);
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else
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led_trigger_event(ams_delta_camera_led_trigger, LED_OFF);
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return 0;
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}
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#else
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#define ams_delta_camera_power NULL
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#endif
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static struct soc_camera_link __initdata ams_delta_iclink = {
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.bus_id = 0, /* OMAP1 SoC camera bus */
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.i2c_adapter_id = 1,
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.board_info = &ams_delta_camera_board_info[0],
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.module_name = "ov6650",
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.power = ams_delta_camera_power,
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};
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static struct platform_device ams_delta_camera_device = {
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.name = "soc-camera-pdrv",
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.id = 0,
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.dev = {
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.platform_data = &ams_delta_iclink,
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},
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};
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static struct omap1_cam_platform_data ams_delta_camera_platform_data = {
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.camexclk_khz = 12000, /* default 12MHz clock, no extra DPLL */
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.lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */
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};
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static struct platform_device *ams_delta_devices[] __initdata = {
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&ams_delta_kp_device,
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&ams_delta_lcd_device,
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&ams_delta_led_device,
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&ams_delta_camera_device,
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};
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static void __init ams_delta_init(void)
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@ -225,6 +275,20 @@ static void __init ams_delta_init(void)
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omap_cfg_reg(UART1_TX);
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omap_cfg_reg(UART1_RTS);
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/* parallel camera interface */
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omap_cfg_reg(H19_1610_CAM_EXCLK);
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omap_cfg_reg(J15_1610_CAM_LCLK);
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omap_cfg_reg(L18_1610_CAM_VS);
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omap_cfg_reg(L15_1610_CAM_HS);
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omap_cfg_reg(L19_1610_CAM_D0);
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omap_cfg_reg(K14_1610_CAM_D1);
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omap_cfg_reg(K15_1610_CAM_D2);
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omap_cfg_reg(K19_1610_CAM_D3);
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omap_cfg_reg(K18_1610_CAM_D4);
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omap_cfg_reg(J14_1610_CAM_D5);
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omap_cfg_reg(J19_1610_CAM_D6);
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omap_cfg_reg(J18_1610_CAM_D7);
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iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
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omap_board_config = ams_delta_config;
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@ -236,6 +300,11 @@ static void __init ams_delta_init(void)
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ams_delta_latch2_write(~0, 0);
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omap1_usb_init(&ams_delta_usb_config);
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omap1_set_camera_info(&ams_delta_camera_platform_data);
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#ifdef CONFIG_LEDS_TRIGGERS
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led_trigger_register_simple("ams_delta_camera",
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&ams_delta_camera_led_trigger);
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#endif
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platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
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#ifdef CONFIG_AMS_DELTA_FIQ
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|
@ -9,6 +9,7 @@
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* (at your option) any later version.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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@ -191,6 +192,48 @@ static inline void omap_init_spi100k(void)
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}
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#endif
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#define OMAP1_CAMERA_BASE 0xfffb6800
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#define OMAP1_CAMERA_IOSIZE 0x1c
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static struct resource omap1_camera_resources[] = {
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[0] = {
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.start = OMAP1_CAMERA_BASE,
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.end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_CAMERA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device omap1_camera_device = {
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.name = "omap1-camera",
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.id = 0, /* This is used to put cameras on this interface */
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.dev = {
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.dma_mask = &omap1_camera_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(omap1_camera_resources),
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.resource = omap1_camera_resources,
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};
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void __init omap1_camera_init(void *info)
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{
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struct platform_device *dev = &omap1_camera_device;
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int ret;
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dev->dev.platform_data = info;
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ret = platform_device_register(dev);
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if (ret)
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dev_err(&dev->dev, "unable to register device: %d\n", ret);
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}
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/*-------------------------------------------------------------------------*/
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static inline void omap_init_sti(void) {}
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|
11
arch/arm/mach-omap1/include/mach/camera.h
Normal file
11
arch/arm/mach-omap1/include/mach/camera.h
Normal file
@ -0,0 +1,11 @@
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#ifndef __ASM_ARCH_CAMERA_H_
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#define __ASM_ARCH_CAMERA_H_
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void omap1_camera_init(void *);
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static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info)
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{
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omap1_camera_init(info);
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}
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#endif /* __ASM_ARCH_CAMERA_H_ */
|
@ -243,6 +243,7 @@ static struct omap2_hsmmc_info mmc[] = {
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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.nonremovable = true,
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.ocr_mask = MMC_VDD_29_30,
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},
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{} /* Terminator */
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};
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@ -276,8 +277,14 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
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static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
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{
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struct omap_mmc_platform_data *pdata = dev->platform_data;
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struct omap_mmc_platform_data *pdata;
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/* dev can be null if CONFIG_MMC_OMAP_HS is not set */
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if (!dev) {
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pr_err("Failed %s\n", __func__);
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return;
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}
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pdata = dev->platform_data;
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pdata->init = omap4_twl6030_hsmmc_late_init;
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}
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|
@ -34,6 +34,7 @@
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#include <linux/gpio_keys.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#include <linux/regulator/fixed.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -345,6 +346,9 @@ static struct regulator_consumer_supply pandora_vmmc1_supply =
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static struct regulator_consumer_supply pandora_vmmc2_supply =
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REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1");
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static struct regulator_consumer_supply pandora_vmmc3_supply =
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REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.2");
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static struct regulator_consumer_supply pandora_vdda_dac_supply =
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REGULATOR_SUPPLY("vdda_dac", "omapdss");
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@ -489,6 +493,33 @@ static struct regulator_init_data pandora_vsim = {
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.consumer_supplies = &pandora_adac_supply,
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};
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/* Fixed regulator internal to Wifi module */
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static struct regulator_init_data pandora_vmmc3 = {
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.constraints = {
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.valid_ops_mask = REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &pandora_vmmc3_supply,
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};
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static struct fixed_voltage_config pandora_vwlan = {
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.supply_name = "vwlan",
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.microvolts = 1800000, /* 1.8V */
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.gpio = PANDORA_WIFI_NRESET_GPIO,
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.startup_delay = 50000, /* 50ms */
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.enable_high = 1,
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.enabled_at_boot = 0,
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.init_data = &pandora_vmmc3,
|
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};
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static struct platform_device pandora_vwlan_device = {
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.name = "reg-fixed-voltage",
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.id = 1,
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.dev = {
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.platform_data = &pandora_vwlan,
|
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},
|
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};
|
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|
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static struct twl4030_usb_data omap3pandora_usb_data = {
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.usb_mode = T2_USB_MODE_ULPI,
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};
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@ -502,6 +533,8 @@ static struct twl4030_codec_data omap3pandora_codec_data = {
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.audio = &omap3pandora_audio_data,
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};
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|
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static struct twl4030_bci_platform_data pandora_bci_data;
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|
||||
static struct twl4030_platform_data omap3pandora_twldata = {
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.irq_base = TWL4030_IRQ_BASE,
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.irq_end = TWL4030_IRQ_END,
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@ -517,6 +550,7 @@ static struct twl4030_platform_data omap3pandora_twldata = {
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||||
.vaux4 = &pandora_vaux4,
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.vsim = &pandora_vsim,
|
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.keypad = &pandora_kp_data,
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||||
.bci = &pandora_bci_data,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
|
||||
@ -645,19 +679,8 @@ static void pandora_wl1251_init(void)
|
||||
if (pandora_wl1251_pdata.irq < 0)
|
||||
goto fail_irq;
|
||||
|
||||
ret = gpio_request(PANDORA_WIFI_NRESET_GPIO, "wl1251 nreset");
|
||||
if (ret < 0)
|
||||
goto fail_irq;
|
||||
|
||||
/* start powered so that it probes with MMC subsystem */
|
||||
ret = gpio_direction_output(PANDORA_WIFI_NRESET_GPIO, 1);
|
||||
if (ret < 0)
|
||||
goto fail_nreset;
|
||||
|
||||
return;
|
||||
|
||||
fail_nreset:
|
||||
gpio_free(PANDORA_WIFI_NRESET_GPIO);
|
||||
fail_irq:
|
||||
gpio_free(PANDORA_WIFI_IRQ_GPIO);
|
||||
fail:
|
||||
@ -669,6 +692,7 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
|
||||
&pandora_keys_gpio,
|
||||
&pandora_dss_device,
|
||||
&pandora_wl1251_data,
|
||||
&pandora_vwlan_device,
|
||||
};
|
||||
|
||||
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
||||
|
@ -817,13 +817,13 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||
case 3:
|
||||
if (!cpu_is_omap44xx())
|
||||
return;
|
||||
base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
|
||||
base = OMAP4_MMC4_BASE;
|
||||
irq = OMAP44XX_IRQ_MMC4;
|
||||
break;
|
||||
case 4:
|
||||
if (!cpu_is_omap44xx())
|
||||
return;
|
||||
base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
|
||||
base = OMAP4_MMC5_BASE;
|
||||
irq = OMAP44XX_IRQ_MMC5;
|
||||
break;
|
||||
default:
|
||||
@ -834,10 +834,8 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||
size = OMAP2420_MMC_SIZE;
|
||||
name = "mmci-omap";
|
||||
} else if (cpu_is_omap44xx()) {
|
||||
if (i < 3) {
|
||||
base += OMAP4_MMC_REG_OFFSET;
|
||||
if (i < 3)
|
||||
irq += OMAP44XX_IRQ_GIC_START;
|
||||
}
|
||||
size = OMAP4_HSMMC_SIZE;
|
||||
name = "mmci-omap-hs";
|
||||
} else {
|
||||
|
@ -266,6 +266,10 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
||||
mmc->slots[0].caps = c->caps;
|
||||
mmc->slots[0].internal_clock = !c->ext_clock;
|
||||
mmc->dma_mask = 0xffffffff;
|
||||
if (cpu_is_omap44xx())
|
||||
mmc->reg_offset = OMAP4_MMC_REG_OFFSET;
|
||||
else
|
||||
mmc->reg_offset = 0;
|
||||
|
||||
mmc->get_context_loss_count = hsmmc_get_context_loss;
|
||||
|
||||
@ -303,6 +307,9 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
||||
else
|
||||
mmc->slots[0].features |= HSMMC_HAS_PBIAS;
|
||||
|
||||
if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
|
||||
mmc->slots[0].features |= HSMMC_HAS_UPDATED_RESET;
|
||||
|
||||
switch (c->mmc) {
|
||||
case 1:
|
||||
if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
|
||||
|
@ -385,6 +385,7 @@ static void __init omap3_cpuinfo(void)
|
||||
strcpy(cpu_name, "OMAP3503");
|
||||
}
|
||||
|
||||
if (cpu_is_omap3630()) {
|
||||
switch (rev) {
|
||||
case OMAP_REVBITS_00:
|
||||
strcpy(cpu_rev, "1.0");
|
||||
@ -393,22 +394,45 @@ static void __init omap3_cpuinfo(void)
|
||||
strcpy(cpu_rev, "1.1");
|
||||
break;
|
||||
case OMAP_REVBITS_02:
|
||||
strcpy(cpu_rev, "1.2");
|
||||
break;
|
||||
case OMAP_REVBITS_10:
|
||||
strcpy(cpu_rev, "2.0");
|
||||
break;
|
||||
case OMAP_REVBITS_20:
|
||||
strcpy(cpu_rev, "2.1");
|
||||
break;
|
||||
case OMAP_REVBITS_30:
|
||||
strcpy(cpu_rev, "3.0");
|
||||
break;
|
||||
case OMAP_REVBITS_40:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
strcpy(cpu_rev, "1.2");
|
||||
}
|
||||
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
|
||||
switch (rev) {
|
||||
case OMAP_REVBITS_00:
|
||||
strcpy(cpu_rev, "1.0");
|
||||
break;
|
||||
case OMAP_REVBITS_01:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
strcpy(cpu_rev, "1.1");
|
||||
}
|
||||
} else {
|
||||
switch (rev) {
|
||||
case OMAP_REVBITS_00:
|
||||
strcpy(cpu_rev, "1.0");
|
||||
break;
|
||||
case OMAP_REVBITS_01:
|
||||
strcpy(cpu_rev, "2.0");
|
||||
break;
|
||||
case OMAP_REVBITS_02:
|
||||
strcpy(cpu_rev, "2.1");
|
||||
break;
|
||||
case OMAP_REVBITS_03:
|
||||
strcpy(cpu_rev, "3.0");
|
||||
break;
|
||||
case OMAP_REVBITS_04:
|
||||
strcpy(cpu_rev, "3.1");
|
||||
break;
|
||||
case OMAP_REVBITS_05:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
strcpy(cpu_rev, "3.1.2");
|
||||
}
|
||||
}
|
||||
|
||||
/* Print verbose information */
|
||||
|
@ -127,17 +127,16 @@ int __init omap_mux_init_gpio(int gpio, int val)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init omap_mux_init_signal(char *muxname, int val)
|
||||
int __init omap_mux_init_signal(const char *muxname, int val)
|
||||
{
|
||||
struct omap_mux_entry *e;
|
||||
char *m0_name = NULL, *mode_name = NULL;
|
||||
int found = 0;
|
||||
const char *mode_name;
|
||||
int found = 0, mode0_len = 0;
|
||||
|
||||
mode_name = strchr(muxname, '.');
|
||||
if (mode_name) {
|
||||
*mode_name = '\0';
|
||||
mode0_len = strlen(muxname) - strlen(mode_name);
|
||||
mode_name++;
|
||||
m0_name = muxname;
|
||||
} else {
|
||||
mode_name = muxname;
|
||||
}
|
||||
@ -147,9 +146,11 @@ int __init omap_mux_init_signal(char *muxname, int val)
|
||||
char *m0_entry = m->muxnames[0];
|
||||
int i;
|
||||
|
||||
if (m0_name && strcmp(m0_name, m0_entry))
|
||||
/* First check for full name in mode0.muxmode format */
|
||||
if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
|
||||
continue;
|
||||
|
||||
/* Then check for muxmode only */
|
||||
for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
|
||||
char *mode_cur = m->muxnames[i];
|
||||
|
||||
|
@ -120,7 +120,7 @@ int omap_mux_init_gpio(int gpio, int val);
|
||||
* @muxname: Mux name in mode0_name.signal_name format
|
||||
* @val: Options for the mux register value
|
||||
*/
|
||||
int omap_mux_init_signal(char *muxname, int val);
|
||||
int omap_mux_init_signal(const char *muxname, int val);
|
||||
|
||||
#else
|
||||
|
||||
|
@ -68,10 +68,9 @@ unsigned int omap_rev(void);
|
||||
#define OMAP_REVBITS_00 0x00
|
||||
#define OMAP_REVBITS_01 0x01
|
||||
#define OMAP_REVBITS_02 0x02
|
||||
#define OMAP_REVBITS_10 0x10
|
||||
#define OMAP_REVBITS_20 0x20
|
||||
#define OMAP_REVBITS_30 0x30
|
||||
#define OMAP_REVBITS_40 0x40
|
||||
#define OMAP_REVBITS_03 0x03
|
||||
#define OMAP_REVBITS_04 0x04
|
||||
#define OMAP_REVBITS_05 0x05
|
||||
|
||||
/*
|
||||
* Get the CPU revision for OMAP devices
|
||||
@ -363,23 +362,24 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
|
||||
/* Various silicon revisions for omap2 */
|
||||
#define OMAP242X_CLASS 0x24200024
|
||||
#define OMAP2420_REV_ES1_0 0x24200024
|
||||
#define OMAP2420_REV_ES2_0 0x24201024
|
||||
#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
|
||||
#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
|
||||
|
||||
#define OMAP243X_CLASS 0x24300024
|
||||
#define OMAP2430_REV_ES1_0 0x24300024
|
||||
#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
|
||||
|
||||
#define OMAP343X_CLASS 0x34300034
|
||||
#define OMAP3430_REV_ES1_0 0x34300034
|
||||
#define OMAP3430_REV_ES2_0 0x34301034
|
||||
#define OMAP3430_REV_ES2_1 0x34302034
|
||||
#define OMAP3430_REV_ES3_0 0x34303034
|
||||
#define OMAP3430_REV_ES3_1 0x34304034
|
||||
#define OMAP3430_REV_ES3_1_2 0x34305034
|
||||
#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
|
||||
#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
|
||||
#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
|
||||
#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
|
||||
#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
|
||||
#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
|
||||
|
||||
#define OMAP3630_REV_ES1_0 0x36300034
|
||||
#define OMAP3630_REV_ES1_1 0x36300134
|
||||
#define OMAP3630_REV_ES1_2 0x36300234
|
||||
#define OMAP363X_CLASS 0x36300034
|
||||
#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
|
||||
#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
|
||||
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
|
||||
|
||||
#define OMAP35XX_CLASS 0x35000034
|
||||
#define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 8))
|
||||
@ -390,7 +390,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
#define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
|
||||
|
||||
#define OMAP443X_CLASS 0x44300044
|
||||
#define OMAP4430_REV_ES1_0 0x44300044
|
||||
#define OMAP4430_REV_ES1_0 OMAP443X_CLASS
|
||||
#define OMAP4430_REV_ES2_0 0x44301044
|
||||
|
||||
/*
|
||||
|
@ -71,6 +71,9 @@ struct omap_mmc_platform_data {
|
||||
|
||||
u64 dma_mask;
|
||||
|
||||
/* Register offset deviation */
|
||||
u16 reg_offset;
|
||||
|
||||
struct omap_mmc_slot_data {
|
||||
|
||||
/*
|
||||
@ -106,6 +109,7 @@ struct omap_mmc_platform_data {
|
||||
|
||||
/* we can put the features above into this variable */
|
||||
#define HSMMC_HAS_PBIAS (1 << 0)
|
||||
#define HSMMC_HAS_UPDATED_RESET (1 << 1)
|
||||
unsigned features;
|
||||
|
||||
int switch_pin; /* gpio (card detect) */
|
||||
|
@ -364,6 +364,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
|
||||
{
|
||||
struct regulator *reg;
|
||||
int ret = 0;
|
||||
int ocr_value = 0;
|
||||
|
||||
switch (host->id) {
|
||||
case OMAP_MMC1_DEVID:
|
||||
@ -396,6 +397,17 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
|
||||
}
|
||||
} else {
|
||||
host->vcc = reg;
|
||||
ocr_value = mmc_regulator_get_ocrmask(reg);
|
||||
if (!mmc_slot(host).ocr_mask) {
|
||||
mmc_slot(host).ocr_mask = ocr_value;
|
||||
} else {
|
||||
if (!(mmc_slot(host).ocr_mask & ocr_value)) {
|
||||
pr_err("MMC%d ocrmask %x is not supported\n",
|
||||
host->id, mmc_slot(host).ocr_mask);
|
||||
mmc_slot(host).ocr_mask = 0;
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
mmc_slot(host).ocr_mask = mmc_regulator_get_ocrmask(reg);
|
||||
|
||||
/* Allow an aux regulator */
|
||||
@ -982,6 +994,17 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
|
||||
OMAP_HSMMC_WRITE(host->base, SYSCTL,
|
||||
OMAP_HSMMC_READ(host->base, SYSCTL) | bit);
|
||||
|
||||
/*
|
||||
* OMAP4 ES2 and greater has an updated reset logic.
|
||||
* Monitor a 0->1 transition first
|
||||
*/
|
||||
if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) {
|
||||
while ((!(OMAP_HSMMC_READ(host, SYSCTL) & bit))
|
||||
&& (i++ < limit))
|
||||
cpu_relax();
|
||||
}
|
||||
i = 0;
|
||||
|
||||
while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) &&
|
||||
(i++ < limit))
|
||||
cpu_relax();
|
||||
@ -2003,6 +2026,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
|
||||
if (res == NULL || irq < 0)
|
||||
return -ENXIO;
|
||||
|
||||
res->start += pdata->reg_offset;
|
||||
res->end += pdata->reg_offset;
|
||||
res = request_mem_region(res->start, res->end - res->start + 1,
|
||||
pdev->name);
|
||||
if (res == NULL)
|
||||
|
Loading…
Reference in New Issue
Block a user