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usb/isp1760: Improve urb queueing, get rid of BUG():s in normal code paths
This patch replaces the code that handles qtds. Intead of directly allocating chip mem and chip slot, enqueue the transfer in a list of queue heads. Use a centralized function enqueue_qtds() to prioritize and enqueue transfers. This removes all of the interrupt context BUG() calls when out of chip mem or transfer slots. It also makes it possible to efficiently use the dual-port mem on the chip for double-buffered transfers, which improve transfer times to/from/between usb sticks by about 40 % on my HW. With this patch it should also be possible to handle qtd scheduling outside of the interrupt handler, for significantly improved kernel latency. I have not implemented this since there are some locking issues which I haven't had time to look at. Signed-off-by: Arvid Brodin <arvid.brodin@enea.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -104,7 +104,7 @@ struct ptd {
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#define ATL_PTD_OFFSET 0x0c00
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#define PAYLOAD_OFFSET 0x1000
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struct inter_packet_info {
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struct slotinfo {
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struct isp1760_qh *qh;
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struct isp1760_qtd *qtd;
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};
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@ -154,54 +154,52 @@ struct memory_chunk {
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/* ATL */
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/* DW0 */
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#define PTD_VALID 1
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#define PTD_LENGTH(x) (((u32) x) << 3)
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#define PTD_MAXPACKET(x) (((u32) x) << 18)
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#define PTD_MULTI(x) (((u32) x) << 29)
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#define PTD_ENDPOINT(x) (((u32) x) << 31)
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#define DW0_VALID_BIT 1
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#define FROM_DW0_VALID(x) ((x) & 0x01)
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#define TO_DW0_LENGTH(x) (((u32) x) << 3)
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#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
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#define TO_DW0_MULTI(x) (((u32) x) << 29)
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#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
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/* DW1 */
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#define PTD_DEVICE_ADDR(x) (((u32) x) << 3)
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#define PTD_PID_TOKEN(x) (((u32) x) << 10)
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#define PTD_TRANS_BULK ((u32) 2 << 12)
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#define PTD_TRANS_INT ((u32) 3 << 12)
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#define PTD_TRANS_SPLIT ((u32) 1 << 14)
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#define PTD_SE_USB_LOSPEED ((u32) 2 << 16)
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#define PTD_PORT_NUM(x) (((u32) x) << 18)
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#define PTD_HUB_NUM(x) (((u32) x) << 25)
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#define PTD_PING(x) (((u32) x) << 26)
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#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
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#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
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#define DW1_TRANS_BULK ((u32) 2 << 12)
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#define DW1_TRANS_INT ((u32) 3 << 12)
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#define DW1_TRANS_SPLIT ((u32) 1 << 14)
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#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
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#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
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#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
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/* DW2 */
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#define PTD_RL_CNT(x) (((u32) x) << 25)
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#define PTD_DATA_START_ADDR(x) (((u32) x) << 8)
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#define BASE_ADDR 0x1000
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#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
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#define TO_DW2_RL(x) ((x) << 25)
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#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
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/* DW3 */
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#define PTD_CERR(x) (((u32) x) << 23)
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#define PTD_NAC_CNT(x) (((u32) x) << 19)
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#define PTD_ACTIVE ((u32) 1 << 31)
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#define PTD_DATA_TOGGLE(x) (((u32) x) << 25)
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#define DW3_HALT_BIT (1 << 30)
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#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
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#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
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#define TO_DW3_NAKCOUNT(x) ((x) << 19)
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#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
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#define TO_DW3_CERR(x) ((x) << 23)
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#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
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#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
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#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
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#define TO_DW3_PING(x) ((x) << 26)
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#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
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#define DW3_ERROR_BIT (1 << 28)
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#define DW3_QTD_ACTIVE (1 << 31)
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#define DW3_BABBLE_BIT (1 << 29)
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#define DW3_HALT_BIT (1 << 30)
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#define DW3_ACTIVE_BIT (1 << 31)
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#define INT_UNDERRUN (1 << 2)
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#define INT_BABBLE (1 << 1)
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#define INT_EXACT (1 << 0)
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#define DW1_GET_PID(x) (((x) >> 10) & 0x3)
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#define PTD_XFERRED_LENGTH(x) ((x) & 0x7fff)
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#define PTD_XFERRED_LENGTH_LO(x) ((x) & 0x7ff)
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#define SETUP_PID (2)
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#define IN_PID (1)
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#define OUT_PID (0)
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#define GET_QTD_TOKEN_TYPE(x) ((x) & 0x3)
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#define DATA_TOGGLE (1 << 31)
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#define GET_DATA_TOGGLE(x) ((x) >> 31)
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/* Errata 1 */
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#define RL_COUNTER (0)
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#define NAK_COUNTER (0)
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#define ERR_COUNTER (2)
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#endif
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#endif /* _ISP1760_HCD_H_ */
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