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sh: avoid using PCIBIOS_MIN_xxx

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Replaces PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM with direct struct
pci_channel access. This allows us to have more than one pci
channel.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm 2009-03-11 15:47:23 +09:00 committed by Paul Mundt
parent d0e3db40e2
commit 710fa3c811
6 changed files with 19 additions and 20 deletions
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2
arch/sh/drivers/pci/fixups-r7780rp.c
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@ -37,7 +37,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
#endif #endif
/* Set IOBR for windows containing area specified in pci.h */ /* Set IOBR for windows containing area specified in pci.h */
pci_write_reg(chan, (PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
SH7780_PCIIOBR); SH7780_PCIIOBR);
pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)), pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
SH7780_PCIIOBMR); SH7780_PCIIOBMR);

2
arch/sh/drivers/pci/fixups-sdk7780.c
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@ -50,7 +50,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */ pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
/* Set IOBR for window containing area specified in pci.h */ /* Set IOBR for window containing area specified in pci.h */
pci_write_reg(chan, PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
SH7780_PCIIOBR); SH7780_PCIIOBR);
pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18), pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18),
SH7780_PCIIOBMR); SH7780_PCIIOBMR);

2
arch/sh/drivers/pci/fixups-se7780.c
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@ -51,7 +51,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */ pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
/* Set IOBR for window containing area specified in pci.h */ /* Set IOBR for window containing area specified in pci.h */
pci_write_reg(chan, PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
SH7780_PCIIOBR); SH7780_PCIIOBR);
pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18), pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18),
SH7780_PCIIOBMR); SH7780_PCIIOBMR);

9
arch/sh/drivers/pci/pci-sh5.c
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@ -206,6 +206,9 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
return 0; return 0;
} }
#define xPCIBIOS_MIN_IO board_pci_channels->io_resource->start
#define xPCIBIOS_MIN_MEM board_pci_channels->mem_resource->start
void __devinit pcibios_fixup_bus(struct pci_bus *bus) void __devinit pcibios_fixup_bus(struct pci_bus *bus)
{ {
struct pci_dev *dev = bus->self; struct pci_dev *dev = bus->self;
@ -223,9 +226,9 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
/* For now, propagate host limits to the bus; /* For now, propagate host limits to the bus;
* we'll adjust them later. */ * we'll adjust them later. */
bus->resource[0]->end = 64*1024 - 1 ; bus->resource[0]->end = 64*1024 - 1 ;
bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1; bus->resource[1]->end = xPCIBIOS_MIN_MEM+(256*1024*1024)-1;
bus->resource[0]->start = PCIBIOS_MIN_IO; bus->resource[0]->start = xPCIBIOS_MIN_IO;
bus->resource[1]->start = PCIBIOS_MIN_MEM; bus->resource[1]->start = xPCIBIOS_MIN_MEM;
/* Turn off downstream PF memory address range by default */ /* Turn off downstream PF memory address range by default */
bus->resource[2]->start = 1024*1024; bus->resource[2]->start = 1024*1024;

14
arch/sh/drivers/pci/pci-sh7751.c
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@ -144,22 +144,20 @@ int __init sh7751_pcic_init(struct pci_channel *chan,
/* Set the local 16MB PCI memory space window to /* Set the local 16MB PCI memory space window to
* the lowest PCI mapped address * the lowest PCI mapped address
*/ */
word = PCIBIOS_MIN_MEM & SH4_PCIMBR_MASK; word = chan->mem_resource->start & SH4_PCIMBR_MASK;
pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
pci_write_reg(chan, word , SH4_PCIMBR); pci_write_reg(chan, word , SH4_PCIMBR);
/* Map IO space into PCI IO window /* Map IO space into PCI IO window:
* The IO window is 64K-PCIBIOS_MIN_IO in size * IO addresses will be translated to the PCI IO window base address
* IO addresses will be translated to the
* PCI IO window base address
*/ */
pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
PCIBIOS_MIN_IO, (64 << 10), chan->io_resource->start, chan->io_resource->end,
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO); SH7751_PCI_IO_BASE + chan->io_resource->start);
/* Make sure the MSB's of IO window are set to access PCI space /* Make sure the MSB's of IO window are set to access PCI space
* correctly */ * correctly */
word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK; word = chan->io_resource->start & SH4_PCIIOBR_MASK;
pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);
pci_write_reg(chan, word, SH4_PCIIOBR); pci_write_reg(chan, word, SH4_PCIIOBR);

10
arch/sh/drivers/pci/pci-sh7780.c
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@ -130,14 +130,12 @@ int __init sh7780_pcic_init(struct pci_channel *chan,
pci_write_reg(chan, map->window1.base, SH4_PCILAR1); pci_write_reg(chan, map->window1.base, SH4_PCILAR1);
pci_write_reg(chan, map->window1.base, SH7780_PCIMBAR1); pci_write_reg(chan, map->window1.base, SH7780_PCIMBAR1);
/* Map IO space into PCI IO window /* Map IO space into PCI IO window:
* The IO window is 64K-PCIBIOS_MIN_IO in size * IO addresses will be translated to the PCI IO window base address
* IO addresses will be translated to the
* PCI IO window base address
*/ */
pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
PCIBIOS_MIN_IO, (64 << 10), chan->io_resource->start, chan->io_resource->end,
SH7780_PCI_IO_BASE + PCIBIOS_MIN_IO); SH7780_PCI_IO_BASE + chan->io_resource->start);
/* NOTE: I'm ignoring the PCI error IRQs for now.. /* NOTE: I'm ignoring the PCI error IRQs for now..
* TODO: add support for the internal error interrupts and * TODO: add support for the internal error interrupts and