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drm/amdgpu: refine code for code style.
White space fix. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -319,7 +319,7 @@ static void vce_v2_0_set_sw_cg(struct amdgpu_device *adev, bool gated)
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WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);
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WREG32(mmVCE_CGTT_CLK_OVERRIDE, 0);
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} else {
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} else {
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tmp = RREG32(mmVCE_CLOCK_GATING_B);
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tmp |= 0xe7;
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tmp &= ~0xe70000;
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