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iommu/vt-d: Apply per-device dma_ops
Current Intel IOMMU driver sets the system level dma_ops. This causes each dma API to go through the IOMMU driver even the devices are using identity mapped domains. This sets per-device dma_ops only if a device is using a DMA domain. Otherwise, use the default system level dma_ops for direct dma. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Tested-by: Daniel Drake <drake@endlessm.com> Reviewed-by: Jon Derrick <jonathan.derrick@intel.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20200506015947.28662-4-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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14b3526d59
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@ -2720,17 +2720,6 @@ static int __init si_domain_init(int hw)
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return 0;
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}
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static int identity_mapping(struct device *dev)
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{
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struct device_domain_info *info;
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info = dev->archdata.iommu;
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if (info)
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return (info->domain == si_domain);
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return 0;
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}
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static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev)
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{
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struct dmar_domain *ndomain;
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@ -3315,18 +3304,6 @@ static unsigned long intel_alloc_iova(struct device *dev,
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return iova_pfn;
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}
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/* Check if the dev needs to go through non-identity map and unmap process.*/
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static bool iommu_need_mapping(struct device *dev)
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{
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if (iommu_dummy(dev))
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return false;
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if (unlikely(attach_deferred(dev)))
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do_deferred_attach(dev);
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return !identity_mapping(dev);
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}
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static dma_addr_t __intel_map_single(struct device *dev, phys_addr_t paddr,
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size_t size, int dir, u64 dma_mask)
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{
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@ -3340,6 +3317,9 @@ static dma_addr_t __intel_map_single(struct device *dev, phys_addr_t paddr,
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BUG_ON(dir == DMA_NONE);
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if (unlikely(attach_deferred(dev)))
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do_deferred_attach(dev);
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domain = find_domain(dev);
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if (!domain)
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return DMA_MAPPING_ERROR;
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@ -3391,20 +3371,15 @@ static dma_addr_t intel_map_page(struct device *dev, struct page *page,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (iommu_need_mapping(dev))
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return __intel_map_single(dev, page_to_phys(page) + offset,
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size, dir, *dev->dma_mask);
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return dma_direct_map_page(dev, page, offset, size, dir, attrs);
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return __intel_map_single(dev, page_to_phys(page) + offset,
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size, dir, *dev->dma_mask);
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}
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static dma_addr_t intel_map_resource(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (iommu_need_mapping(dev))
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return __intel_map_single(dev, phys_addr, size, dir,
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*dev->dma_mask);
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return dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
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return __intel_map_single(dev, phys_addr, size, dir, *dev->dma_mask);
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}
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static void intel_unmap(struct device *dev, dma_addr_t dev_addr, size_t size)
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@ -3455,17 +3430,13 @@ static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (iommu_need_mapping(dev))
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intel_unmap(dev, dev_addr, size);
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else
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dma_direct_unmap_page(dev, dev_addr, size, dir, attrs);
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intel_unmap(dev, dev_addr, size);
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}
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static void intel_unmap_resource(struct device *dev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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if (iommu_need_mapping(dev))
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intel_unmap(dev, dev_addr, size);
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intel_unmap(dev, dev_addr, size);
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}
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static void *intel_alloc_coherent(struct device *dev, size_t size,
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@ -3475,8 +3446,8 @@ static void *intel_alloc_coherent(struct device *dev, size_t size,
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struct page *page = NULL;
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int order;
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if (!iommu_need_mapping(dev))
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return dma_direct_alloc(dev, size, dma_handle, flags, attrs);
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if (unlikely(attach_deferred(dev)))
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do_deferred_attach(dev);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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@ -3511,9 +3482,6 @@ static void intel_free_coherent(struct device *dev, size_t size, void *vaddr,
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int order;
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struct page *page = virt_to_page(vaddr);
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if (!iommu_need_mapping(dev))
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return dma_direct_free(dev, size, vaddr, dma_handle, attrs);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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@ -3531,9 +3499,6 @@ static void intel_unmap_sg(struct device *dev, struct scatterlist *sglist,
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struct scatterlist *sg;
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int i;
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if (!iommu_need_mapping(dev))
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return dma_direct_unmap_sg(dev, sglist, nelems, dir, attrs);
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for_each_sg(sglist, sg, nelems, i) {
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nrpages += aligned_nrpages(sg_dma_address(sg), sg_dma_len(sg));
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}
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@ -3557,8 +3522,9 @@ static int intel_map_sg(struct device *dev, struct scatterlist *sglist, int nele
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struct intel_iommu *iommu;
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BUG_ON(dir == DMA_NONE);
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if (!iommu_need_mapping(dev))
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return dma_direct_map_sg(dev, sglist, nelems, dir, attrs);
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if (unlikely(attach_deferred(dev)))
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do_deferred_attach(dev);
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domain = find_domain(dev);
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if (!domain)
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@ -3605,8 +3571,6 @@ static int intel_map_sg(struct device *dev, struct scatterlist *sglist, int nele
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static u64 intel_get_required_mask(struct device *dev)
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{
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if (!iommu_need_mapping(dev))
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return dma_direct_get_required_mask(dev);
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return DMA_BIT_MASK(32);
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}
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@ -4888,8 +4852,6 @@ int __init intel_iommu_init(void)
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}
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up_write(&dmar_global_lock);
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dma_ops = &intel_dma_ops;
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init_iommu_pm_ops();
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down_read(&dmar_global_lock);
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@ -5479,11 +5441,6 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev)
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if (translation_pre_enabled(iommu))
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dev->archdata.iommu = DEFER_DEVICE_DOMAIN_INFO;
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if (device_needs_bounce(dev)) {
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dev_info(dev, "Use Intel IOMMU bounce page dma_ops\n");
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set_dma_ops(dev, &bounce_dma_ops);
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}
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return &iommu->iommu;
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}
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@ -5498,7 +5455,19 @@ static void intel_iommu_release_device(struct device *dev)
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dmar_remove_one_dev_info(dev);
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set_dma_ops(dev, NULL);
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}
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static void intel_iommu_probe_finalize(struct device *dev)
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{
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struct iommu_domain *domain;
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domain = iommu_get_domain_for_dev(dev);
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if (device_needs_bounce(dev))
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set_dma_ops(dev, &bounce_dma_ops);
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else if (domain && domain->type == IOMMU_DOMAIN_DMA)
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set_dma_ops(dev, &intel_dma_ops);
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else
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set_dma_ops(dev, NULL);
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}
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@ -5830,6 +5799,7 @@ const struct iommu_ops intel_iommu_ops = {
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.unmap = intel_iommu_unmap,
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.iova_to_phys = intel_iommu_iova_to_phys,
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.probe_device = intel_iommu_probe_device,
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.probe_finalize = intel_iommu_probe_finalize,
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.release_device = intel_iommu_release_device,
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.get_resv_regions = intel_iommu_get_resv_regions,
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.put_resv_regions = generic_iommu_put_resv_regions,
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