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drm/amdgpu: add disable_cu parameter
This parameter will allow disabling individual CUs on module load, e.g. amdgpu.disable_cu=2.0.3,2.0.4 to disable CUs 3 and 4 of SE2. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -90,6 +90,7 @@ extern unsigned amdgpu_pcie_gen_cap;
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extern unsigned amdgpu_pcie_lane_cap;
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extern unsigned amdgpu_cg_mask;
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extern unsigned amdgpu_pg_mask;
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extern char *amdgpu_disable_cu;
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#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
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#define AMDGPU_MAX_USEC_TIMEOUT 100000 /* 100 ms */
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@ -87,6 +87,7 @@ unsigned amdgpu_pcie_gen_cap = 0;
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unsigned amdgpu_pcie_lane_cap = 0;
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unsigned amdgpu_cg_mask = 0xffffffff;
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unsigned amdgpu_pg_mask = 0xffffffff;
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char *amdgpu_disable_cu = NULL;
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MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
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module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
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@ -180,6 +181,9 @@ module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
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MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
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module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
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MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
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module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
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static const struct pci_device_id pciidlist[] = {
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#ifdef CONFIG_DRM_AMDGPU_CIK
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/* Kaveri */
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@ -70,3 +70,47 @@ void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg)
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}
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}
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}
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/**
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* amdgpu_gfx_parse_disable_cu - Parse the disable_cu module parameter
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*
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* @mask: array in which the per-shader array disable masks will be stored
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* @max_se: number of SEs
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* @max_sh: number of SHs
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*
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* The bitmask of CUs to be disabled in the shader array determined by se and
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* sh is stored in mask[se * max_sh + sh].
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*/
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void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_sh)
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{
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unsigned se, sh, cu;
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const char *p;
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memset(mask, 0, sizeof(*mask) * max_se * max_sh);
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if (!amdgpu_disable_cu || !*amdgpu_disable_cu)
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return;
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p = amdgpu_disable_cu;
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for (;;) {
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char *next;
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int ret = sscanf(p, "%u.%u.%u", &se, &sh, &cu);
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if (ret < 3) {
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DRM_ERROR("amdgpu: could not parse disable_cu\n");
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return;
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}
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if (se < max_se && sh < max_sh && cu < 16) {
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DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu);
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mask[se * max_sh + sh] |= 1u << cu;
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} else {
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DRM_ERROR("amdgpu: disable_cu %u.%u.%u is out of range\n",
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se, sh, cu);
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}
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next = strchr(p, ',');
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if (!next)
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break;
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p = next + 1;
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}
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}
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@ -27,4 +27,6 @@
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int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg);
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void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg);
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unsigned amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_sh);
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#endif
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