mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 20:23:57 +08:00
x86: unify mc146818rtc.h - prepare for sharing rtc code
Unify mc146818rtc.h by adding the rtc_cmos_read/write functions to time_64.c. This is a preparatory patch to finaly share the rtc code, which is unsurprisingly similar. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Thomas Gleixner
Ingo Molnar
parent
4ec08da02f
commit
6ce60b07e6
@ -69,6 +69,27 @@ unsigned long profile_pc(struct pt_regs *regs)
|
||||
}
|
||||
EXPORT_SYMBOL(profile_pc);
|
||||
|
||||
/* Routines for accessing the CMOS RAM/RTC. */
|
||||
unsigned char rtc_cmos_read(unsigned char addr)
|
||||
{
|
||||
unsigned char val;
|
||||
lock_cmos_prefix(addr);
|
||||
outb_p(addr, RTC_PORT(0));
|
||||
val = inb_p(RTC_PORT(1));
|
||||
lock_cmos_suffix(addr);
|
||||
return val;
|
||||
}
|
||||
EXPORT_SYMBOL(rtc_cmos_read);
|
||||
|
||||
void rtc_cmos_write(unsigned char val, unsigned char addr)
|
||||
{
|
||||
lock_cmos_prefix(addr);
|
||||
outb_p(addr, RTC_PORT(0));
|
||||
outb_p(val, RTC_PORT(1));
|
||||
lock_cmos_suffix(addr);
|
||||
}
|
||||
EXPORT_SYMBOL(rtc_cmos_write);
|
||||
|
||||
/*
|
||||
* In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
|
||||
* ms after the second nowtime has started, because when nowtime is written
|
||||
|
||||
@ -1,5 +1,97 @@
|
||||
#ifdef CONFIG_X86_32
|
||||
# include "mc146818rtc_32.h"
|
||||
#else
|
||||
# include "mc146818rtc_64.h"
|
||||
/*
|
||||
* Machine dependent access functions for RTC registers.
|
||||
*/
|
||||
#ifndef _ASM_MC146818RTC_H
|
||||
#define _ASM_MC146818RTC_H
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/processor.h>
|
||||
#include <linux/mc146818rtc.h>
|
||||
|
||||
#ifndef RTC_PORT
|
||||
#define RTC_PORT(x) (0x70 + (x))
|
||||
#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
|
||||
/*
|
||||
* This lock provides nmi access to the CMOS/RTC registers. It has some
|
||||
* special properties. It is owned by a CPU and stores the index register
|
||||
* currently being accessed (if owned). The idea here is that it works
|
||||
* like a normal lock (normally). However, in an NMI, the NMI code will
|
||||
* first check to see if its CPU owns the lock, meaning that the NMI
|
||||
* interrupted during the read/write of the device. If it does, it goes ahead
|
||||
* and performs the access and then restores the index register. If it does
|
||||
* not, it locks normally.
|
||||
*
|
||||
* Note that since we are working with NMIs, we need this lock even in
|
||||
* a non-SMP machine just to mark that the lock is owned.
|
||||
*
|
||||
* This only works with compare-and-swap. There is no other way to
|
||||
* atomically claim the lock and set the owner.
|
||||
*/
|
||||
#include <linux/smp.h>
|
||||
extern volatile unsigned long cmos_lock;
|
||||
|
||||
/*
|
||||
* All of these below must be called with interrupts off, preempt
|
||||
* disabled, etc.
|
||||
*/
|
||||
|
||||
static inline void lock_cmos(unsigned char reg)
|
||||
{
|
||||
unsigned long new;
|
||||
new = ((smp_processor_id()+1) << 8) | reg;
|
||||
for (;;) {
|
||||
if (cmos_lock) {
|
||||
cpu_relax();
|
||||
continue;
|
||||
}
|
||||
if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void unlock_cmos(void)
|
||||
{
|
||||
cmos_lock = 0;
|
||||
}
|
||||
static inline int do_i_have_lock_cmos(void)
|
||||
{
|
||||
return (cmos_lock >> 8) == (smp_processor_id()+1);
|
||||
}
|
||||
static inline unsigned char current_lock_cmos_reg(void)
|
||||
{
|
||||
return cmos_lock & 0xff;
|
||||
}
|
||||
#define lock_cmos_prefix(reg) \
|
||||
do { \
|
||||
unsigned long cmos_flags; \
|
||||
local_irq_save(cmos_flags); \
|
||||
lock_cmos(reg)
|
||||
#define lock_cmos_suffix(reg) \
|
||||
unlock_cmos(); \
|
||||
local_irq_restore(cmos_flags); \
|
||||
} while (0)
|
||||
#else
|
||||
#define lock_cmos_prefix(reg) do {} while (0)
|
||||
#define lock_cmos_suffix(reg) do {} while (0)
|
||||
#define lock_cmos(reg)
|
||||
#define unlock_cmos()
|
||||
#define do_i_have_lock_cmos() 0
|
||||
#define current_lock_cmos_reg() 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The yet supported machines all access the RTC index register via
|
||||
* an ISA port access but the way to access the date register differs ...
|
||||
*/
|
||||
#define CMOS_READ(addr) rtc_cmos_read(addr)
|
||||
#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
|
||||
unsigned char rtc_cmos_read(unsigned char addr);
|
||||
void rtc_cmos_write(unsigned char val, unsigned char addr);
|
||||
|
||||
#define RTC_IRQ 8
|
||||
|
||||
#endif /* _ASM_MC146818RTC_H */
|
||||
|
||||
@ -1,97 +0,0 @@
|
||||
/*
|
||||
* Machine dependent access functions for RTC registers.
|
||||
*/
|
||||
#ifndef _ASM_MC146818RTC_H
|
||||
#define _ASM_MC146818RTC_H
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/processor.h>
|
||||
#include <linux/mc146818rtc.h>
|
||||
|
||||
#ifndef RTC_PORT
|
||||
#define RTC_PORT(x) (0x70 + (x))
|
||||
#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
|
||||
#endif
|
||||
|
||||
#ifdef __HAVE_ARCH_CMPXCHG
|
||||
/*
|
||||
* This lock provides nmi access to the CMOS/RTC registers. It has some
|
||||
* special properties. It is owned by a CPU and stores the index register
|
||||
* currently being accessed (if owned). The idea here is that it works
|
||||
* like a normal lock (normally). However, in an NMI, the NMI code will
|
||||
* first check to see if its CPU owns the lock, meaning that the NMI
|
||||
* interrupted during the read/write of the device. If it does, it goes ahead
|
||||
* and performs the access and then restores the index register. If it does
|
||||
* not, it locks normally.
|
||||
*
|
||||
* Note that since we are working with NMIs, we need this lock even in
|
||||
* a non-SMP machine just to mark that the lock is owned.
|
||||
*
|
||||
* This only works with compare-and-swap. There is no other way to
|
||||
* atomically claim the lock and set the owner.
|
||||
*/
|
||||
#include <linux/smp.h>
|
||||
extern volatile unsigned long cmos_lock;
|
||||
|
||||
/*
|
||||
* All of these below must be called with interrupts off, preempt
|
||||
* disabled, etc.
|
||||
*/
|
||||
|
||||
static inline void lock_cmos(unsigned char reg)
|
||||
{
|
||||
unsigned long new;
|
||||
new = ((smp_processor_id()+1) << 8) | reg;
|
||||
for (;;) {
|
||||
if (cmos_lock) {
|
||||
cpu_relax();
|
||||
continue;
|
||||
}
|
||||
if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void unlock_cmos(void)
|
||||
{
|
||||
cmos_lock = 0;
|
||||
}
|
||||
static inline int do_i_have_lock_cmos(void)
|
||||
{
|
||||
return (cmos_lock >> 8) == (smp_processor_id()+1);
|
||||
}
|
||||
static inline unsigned char current_lock_cmos_reg(void)
|
||||
{
|
||||
return cmos_lock & 0xff;
|
||||
}
|
||||
#define lock_cmos_prefix(reg) \
|
||||
do { \
|
||||
unsigned long cmos_flags; \
|
||||
local_irq_save(cmos_flags); \
|
||||
lock_cmos(reg)
|
||||
#define lock_cmos_suffix(reg) \
|
||||
unlock_cmos(); \
|
||||
local_irq_restore(cmos_flags); \
|
||||
} while (0)
|
||||
#else
|
||||
#define lock_cmos_prefix(reg) do {} while (0)
|
||||
#define lock_cmos_suffix(reg) do {} while (0)
|
||||
#define lock_cmos(reg)
|
||||
#define unlock_cmos()
|
||||
#define do_i_have_lock_cmos() 0
|
||||
#define current_lock_cmos_reg() 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The yet supported machines all access the RTC index register via
|
||||
* an ISA port access but the way to access the date register differs ...
|
||||
*/
|
||||
#define CMOS_READ(addr) rtc_cmos_read(addr)
|
||||
#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
|
||||
unsigned char rtc_cmos_read(unsigned char addr);
|
||||
void rtc_cmos_write(unsigned char val, unsigned char addr);
|
||||
|
||||
#define RTC_IRQ 8
|
||||
|
||||
#endif /* _ASM_MC146818RTC_H */
|
||||
@ -1,29 +0,0 @@
|
||||
/*
|
||||
* Machine dependent access functions for RTC registers.
|
||||
*/
|
||||
#ifndef _ASM_MC146818RTC_H
|
||||
#define _ASM_MC146818RTC_H
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifndef RTC_PORT
|
||||
#define RTC_PORT(x) (0x70 + (x))
|
||||
#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The yet supported machines all access the RTC index register via
|
||||
* an ISA port access but the way to access the date register differs ...
|
||||
*/
|
||||
#define CMOS_READ(addr) ({ \
|
||||
outb_p((addr),RTC_PORT(0)); \
|
||||
inb_p(RTC_PORT(1)); \
|
||||
})
|
||||
#define CMOS_WRITE(val, addr) ({ \
|
||||
outb_p((addr),RTC_PORT(0)); \
|
||||
outb_p((val),RTC_PORT(1)); \
|
||||
})
|
||||
|
||||
#define RTC_IRQ 8
|
||||
|
||||
#endif /* _ASM_MC146818RTC_H */
|
||||
Loading…
Reference in New Issue
Block a user