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arm64: switch to relative exception tables
Instead of using absolute addresses for both the exception location and the fixup, use offsets relative to the exception table entry values. Not only does this cut the size of the exception table in half, it is also a prerequisite for KASLR, since absolute exception table entries are subject to dynamic relocation, which is incompatible with the sorting of the exception table that occurs at build time. This patch also introduces the _ASM_EXTABLE preprocessor macro (which exists on x86 as well) and its _asm_extable assembly counterpart, as shorthands to emit exception table entries. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Ard Biesheuvel
Catalin Marinas
parent
a272858a3c
commit
6c94f27ac8
@ -157,11 +157,8 @@ void apply_alternatives(void *start, size_t length);
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add \addr, \addr, \post_inc;
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alternative_endif
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.section __ex_table,"a";
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.align 3;
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.quad 8888b,\l;
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.quad 8889b,\l;
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.previous;
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_asm_extable 8888b,\l;
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_asm_extable 8889b,\l;
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.endm
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.macro uao_stp l, reg1, reg2, addr, post_inc
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@ -175,11 +172,8 @@ void apply_alternatives(void *start, size_t length);
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add \addr, \addr, \post_inc;
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alternative_endif
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.section __ex_table,"a";
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.align 3;
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.quad 8888b,\l;
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.quad 8889b,\l;
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.previous
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_asm_extable 8888b,\l;
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_asm_extable 8889b,\l;
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.endm
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.macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc
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@ -191,10 +185,7 @@ void apply_alternatives(void *start, size_t length);
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add \addr, \addr, \post_inc;
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alternative_endif
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.section __ex_table,"a";
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.align 3;
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.quad 8888b,\l;
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.previous
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_asm_extable 8888b,\l;
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.endm
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#else
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.macro uao_ldp l, reg1, reg2, addr, post_inc
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@ -94,12 +94,19 @@
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dmb \opt
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.endm
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/*
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* Emit an entry into the exception table
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*/
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.macro _asm_extable, from, to
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.pushsection __ex_table, "a"
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.align 3
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.long (\from - .), (\to - .)
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.popsection
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.endm
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#define USER(l, x...) \
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9999: x; \
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.section __ex_table,"a"; \
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.align 3; \
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.quad 9999b,l; \
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.previous
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_asm_extable 9999b, l
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/*
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* Register aliases.
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@ -42,10 +42,8 @@
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"4: mov %w0, %w5\n" \
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" b 3b\n" \
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" .popsection\n" \
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" .pushsection __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .quad 1b, 4b, 2b, 4b\n" \
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" .popsection\n" \
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_ASM_EXTABLE(1b, 4b) \
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_ASM_EXTABLE(2b, 4b) \
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ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \
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CONFIG_ARM64_PAN) \
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: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
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@ -134,10 +132,8 @@ ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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"4: mov %w0, %w6\n"
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" b 3b\n"
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" .popsection\n"
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" .pushsection __ex_table,\"a\"\n"
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" .align 3\n"
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" .quad 1b, 4b, 2b, 4b\n"
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" .popsection\n"
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_ASM_EXTABLE(1b, 4b)
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_ASM_EXTABLE(2b, 4b)
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ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
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: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
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@ -36,11 +36,11 @@
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#define VERIFY_WRITE 1
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/*
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* The exception table consists of pairs of addresses: the first is the
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* address of an instruction that is allowed to fault, and the second is
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* the address at which the program should continue. No registers are
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* modified, so it is entirely up to the continuation code to figure out
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* what to do.
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* The exception table consists of pairs of relative offsets: the first
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* is the relative offset to an instruction that is allowed to fault,
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* and the second is the relative offset at which the program should
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* continue. No registers are modified, so it is entirely up to the
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* continuation code to figure out what to do.
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*
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* All the routines below use bits of fixup code that are out of line
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* with the main instruction path. This means when everything is well,
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@ -50,9 +50,11 @@
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struct exception_table_entry
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{
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unsigned long insn, fixup;
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int insn, fixup;
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};
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#define ARCH_HAS_RELATIVE_EXTABLE
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extern int fixup_exception(struct pt_regs *regs);
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#define KERNEL_DS (-1UL)
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@ -115,6 +117,12 @@ static inline void set_fs(mm_segment_t fs)
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#define access_ok(type, addr, size) __range_ok(addr, size)
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#define user_addr_max get_fs
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#define _ASM_EXTABLE(from, to) \
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" .pushsection __ex_table, \"a\"\n" \
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" .align 3\n" \
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" .long (" #from " - .), (" #to " - .)\n" \
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" .popsection\n"
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/*
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* The "__xxx" versions of the user access functions do not verify the address
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* space - it must have been done previously with a separate "access_ok()"
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@ -134,10 +142,7 @@ static inline void set_fs(mm_segment_t fs)
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" mov %1, #0\n" \
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" b 2b\n" \
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" .previous\n" \
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" .section __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .quad 1b, 3b\n" \
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" .previous" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err), "=&r" (x) \
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: "r" (addr), "i" (-EFAULT))
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@ -206,10 +211,7 @@ do { \
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"3: mov %w0, %3\n" \
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" b 2b\n" \
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" .previous\n" \
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" .section __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .quad 1b, 3b\n" \
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" .previous" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err) \
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: "r" (x), "r" (addr), "i" (-EFAULT))
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@ -16,6 +16,8 @@
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#ifndef __ASM_WORD_AT_A_TIME_H
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#define __ASM_WORD_AT_A_TIME_H
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#include <asm/uaccess.h>
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#ifndef __AARCH64EB__
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#include <linux/kernel.h>
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@ -81,10 +83,7 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
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#endif
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" b 2b\n"
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" .popsection\n"
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" .pushsection __ex_table,\"a\"\n"
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" .align 3\n"
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" .quad 1b, 3b\n"
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" .popsection"
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_ASM_EXTABLE(1b, 3b)
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: "=&r" (ret), "=&r" (offset)
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: "r" (addr), "Q" (*(unsigned long *)addr));
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@ -297,11 +297,8 @@ static void __init register_insn_emulation_sysctl(struct ctl_table *table)
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"4: mov %w0, %w5\n" \
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" b 3b\n" \
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" .popsection" \
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" .pushsection __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .quad 0b, 4b\n" \
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" .quad 1b, 4b\n" \
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" .popsection\n" \
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_ASM_EXTABLE(0b, 4b) \
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_ASM_EXTABLE(1b, 4b) \
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ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \
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CONFIG_ARM64_PAN) \
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: "=&r" (res), "+r" (data), "=&r" (temp) \
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@ -11,7 +11,7 @@ int fixup_exception(struct pt_regs *regs)
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fixup = search_exception_tables(instruction_pointer(regs));
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if (fixup)
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regs->pc = fixup->fixup;
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regs->pc = (unsigned long)&fixup->fixup + fixup->fixup;
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return fixup != NULL;
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}
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@ -282,12 +282,12 @@ do_file(char const *const fname)
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case EM_386:
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case EM_X86_64:
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case EM_S390:
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case EM_AARCH64:
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custom_sort = sort_relative_table;
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break;
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case EM_ARCOMPACT:
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case EM_ARCV2:
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case EM_ARM:
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case EM_AARCH64:
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case EM_MICROBLAZE:
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case EM_MIPS:
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case EM_XTENSA:
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