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mtd: st_spi_fsm: begin using spi-nor.h opcodes
Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h. Let's begin to unify them. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
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@ -13,25 +13,12 @@
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#define _MTD_SERIAL_FLASH_CMDS_H
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/* Generic Flash Commands/OPCODEs */
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#define SPINOR_OP_WREN 0x06
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#define SPINOR_OP_WRDI 0x04
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#define SPINOR_OP_RDID 0x9f
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#define SPINOR_OP_RDSR 0x05
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#define SPINOR_OP_RDSR2 0x35
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#define SPINOR_OP_WRSR 0x01
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#define SPINOR_OP_SE_4K 0x20
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#define SPINOR_OP_SE_32K 0x52
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#define SPINOR_OP_SE 0xd8
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#define SPINOR_OP_CHIPERASE 0xc7
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#define SPINOR_OP_WRVCR 0x81
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#define SPINOR_OP_RDVCR 0x85
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/* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */
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#define SPINOR_OP_READ 0x03 /* READ */
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#define SPINOR_OP_READ_FAST 0x0b /* FAST READ */
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#define SPINOR_OP_READ_1_1_2 0x3b /* DUAL OUTPUT READ */
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#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */
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#define SPINOR_OP_READ_1_1_4 0x6b /* QUAD OUTPUT READ */
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#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */
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#define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */
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@ -40,15 +27,8 @@
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#define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */
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#define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */
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#define SPINOR_OP_EN4B_ADDR 0xb7 /* Enter 4-byte address mode */
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#define SPINOR_OP_EX4B_ADDR 0xe9 /* Exit 4-byte address mode */
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/* READ commands with 32-bit addressing */
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#define SPINOR_OP_READ4 0x13
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#define SPINOR_OP_READ4_FAST 0x0c
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#define SPINOR_OP_READ4_1_1_2 0x3c
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#define SPINOR_OP_READ4_1_2_2 0xbc
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#define SPINOR_OP_READ4_1_1_4 0x6c
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#define SPINOR_OP_READ4_1_4_4 0xec
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/* Configuration flags */
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@ -19,6 +19,7 @@
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#include <linux/mfd/syscon.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/spi-nor.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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@ -522,7 +523,7 @@ static int stfsm_mx25_en_32bit_addr_seq(struct stfsm_seq *seq)
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{
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seq->seq_opc[0] = (SEQ_OPC_PADS_1 |
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SEQ_OPC_CYCLES(8) |
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SEQ_OPC_OPCODE(SPINOR_OP_EN4B_ADDR) |
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SEQ_OPC_OPCODE(SPINOR_OP_EN4B) |
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SEQ_OPC_CSDEASSERT);
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seq->seq[0] = STFSM_INST_CMD1;
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@ -630,7 +631,7 @@ static struct stfsm_seq stfsm_seq_erase_chip = {
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SEQ_OPC_OPCODE(SPINOR_OP_WREN) | SEQ_OPC_CSDEASSERT),
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(SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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SEQ_OPC_OPCODE(SPINOR_OP_CHIPERASE) | SEQ_OPC_CSDEASSERT),
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SEQ_OPC_OPCODE(SPINOR_OP_CHIP_ERASE) | SEQ_OPC_CSDEASSERT),
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},
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.seq = {
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STFSM_INST_CMD1,
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@ -665,7 +666,7 @@ static struct stfsm_seq stfsm_seq_write_status = {
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static int stfsm_n25q_en_32bit_addr_seq(struct stfsm_seq *seq)
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{
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seq->seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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SEQ_OPC_OPCODE(SPINOR_OP_EN4B_ADDR));
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SEQ_OPC_OPCODE(SPINOR_OP_EN4B));
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seq->seq_opc[1] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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SEQ_OPC_OPCODE(SPINOR_OP_WREN) |
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SEQ_OPC_CSDEASSERT);
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@ -788,7 +789,7 @@ static int stfsm_write_fifo(struct stfsm *fsm, const uint32_t *buf,
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static int stfsm_enter_32bit_addr(struct stfsm *fsm, int enter)
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{
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struct stfsm_seq *seq = &fsm->stfsm_seq_en_32bit_addr;
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uint32_t cmd = enter ? SPINOR_OP_EN4B_ADDR : SPINOR_OP_EX4B_ADDR;
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uint32_t cmd = enter ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
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seq->seq_opc[0] = (SEQ_OPC_PADS_1 |
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SEQ_OPC_CYCLES(8) |
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