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MIPS: Lantiq: Fix cascaded IRQ setup
With the IRQ stack changes integrated, the XRX200 devices started emitting a constant stream of kernel messages like this: [ 565.415310] Spurious IRQ: CAUSE=0x1100c300 This is caused by IP0 getting handled by plat_irq_dispatch() rather than its vectored interrupt handler, which is fixed by commit de856416e714 ("MIPS: IRQ Stack: Fix erroneous jal to plat_irq_dispatch"). Fix plat_irq_dispatch() to handle non-vectored IPI interrupts correctly by setting up IP2-6 as proper chained IRQ handlers and calling do_IRQ for all MIPS CPU interrupts. Signed-off-by: Felix Fietkau <nbd@nbd.name> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15077/ [james.hogan@imgtec.com: tweaked commit message] Signed-off-by: James Hogan <james.hogan@imgtec.com>
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@ -269,6 +269,11 @@ static void ltq_hw5_irqdispatch(void)
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DEFINE_HWx_IRQDISPATCH(5)
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#endif
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static void ltq_hw_irq_handler(struct irq_desc *desc)
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{
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ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
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}
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#ifdef CONFIG_MIPS_MT_SMP
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void __init arch_init_ipiirq(int irq, struct irqaction *action)
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{
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@ -313,23 +318,19 @@ static struct irqaction irq_call = {
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
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unsigned int i;
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int irq;
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if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
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do_IRQ(MIPS_CPU_TIMER_IRQ);
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goto out;
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} else {
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for (i = 0; i < MAX_IM; i++) {
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if (pending & (CAUSEF_IP2 << i)) {
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ltq_hw_irqdispatch(i);
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goto out;
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}
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}
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if (!pending) {
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spurious_interrupt();
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return;
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}
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pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
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out:
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return;
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pending >>= CAUSEB_IP;
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while (pending) {
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irq = fls(pending) - 1;
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do_IRQ(MIPS_CPU_IRQ_BASE + irq);
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pending &= ~BIT(irq);
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}
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}
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static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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@ -354,11 +355,6 @@ static const struct irq_domain_ops irq_domain_ops = {
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.map = icu_map,
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};
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static struct irqaction cascade = {
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.handler = no_action,
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.name = "cascade",
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};
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int __init icu_of_init(struct device_node *node, struct device_node *parent)
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{
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struct device_node *eiu_node;
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@ -390,7 +386,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
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mips_cpu_irq_init();
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for (i = 0; i < MAX_IM; i++)
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setup_irq(i + 2, &cascade);
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irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
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if (cpu_has_vint) {
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pr_info("Setting up vectored interrupts\n");
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