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https://github.com/edk2-porting/linux-next.git
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wlcore: add new reg-domain configuration command
In 18xx the calibration process of the PHY Cortex domain requires to perform an active calibration of the channel before it can be used for transmission. To fulfill world wide regulatory restrictions, fw should be always synchronized/updated with current CRDA configuration. Add a new "CMD_DFS_CHANNEL_CONFIG" command to update the fw with current reg-domain, this command passes a bit map of channels that are allowed to be used for transmission. The driver shall update the fw during initialization and after each change in the current reg-domain configuration. The driver will save the channel number of incoming beacons during the scan process, as they might be a result of the passive scan on "IEEE80211_CHAN_PASSIVE_SCAN" channel and will update the fw accordingly once the scan is finished, the purpose of this is to be ready in case of the authentication request on one of these disabled (uncalibrated) channels. The new command requires to wait for the fw completion event "DFS_CHANNELS_CONFIG_COMPLETE_EVENT". No scan commands (including the sched scan) can be executed concurrently with the "CMD_DFS_CHANNEL_CONFIG", wl->mutex ensures that. [Arik - move reset of reg_ch_conf_last to safe place inside op_stop_locked] [Eliad - adjust to new event waiting api] Signed-off-by: Victor Goldenshtein <victorg@ti.com> Signed-off-by: Arik Nemtsov <arik@wizery.com> Signed-off-by: Eliad Peller <eliad@wizery.com> Signed-off-by: Luciano Coelho <coelho@ti.com>
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978cd3a0b8
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6b70e7eb70
@ -34,6 +34,10 @@ int wl18xx_wait_for_event(struct wl1271 *wl, enum wlcore_wait_event event,
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local_event = PEER_REMOVE_COMPLETE_EVENT_ID;
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break;
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case WLCORE_EVENT_DFS_CONFIG_COMPLETE:
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local_event = DFS_CHANNELS_CONFIG_COMPLETE_EVENT;
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break;
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default:
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/* event not implemented */
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return 0;
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@ -616,6 +616,7 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
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WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN |
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WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN |
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WLCORE_QUIRK_TX_PAD_LAST_FRAME |
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WLCORE_QUIRK_REGDOMAIN_CONF |
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WLCORE_QUIRK_DUAL_PROBE_TMPL;
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wlcore_set_min_fw_ver(wl, WL18XX_CHIP_VER, WL18XX_IFTYPE_VER,
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@ -862,7 +863,8 @@ static int wl18xx_boot(struct wl1271 *wl)
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REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |
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INACTIVE_STA_EVENT_ID |
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MAX_TX_FAILURE_EVENT_ID |
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CHANNEL_SWITCH_COMPLETE_EVENT_ID;
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CHANNEL_SWITCH_COMPLETE_EVENT_ID |
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DFS_CHANNELS_CONFIG_COMPLETE_EVENT;
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ret = wlcore_boot_run_firmware(wl);
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if (ret < 0)
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@ -1503,6 +1503,131 @@ out:
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return ret;
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}
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static int wlcore_get_reg_conf_ch_idx(enum ieee80211_band band, u16 ch)
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{
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int idx = -1;
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switch (band) {
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case IEEE80211_BAND_5GHZ:
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if (ch >= 8 && ch <= 16)
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idx = ((ch-8)/4 + 18);
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else if (ch >= 34 && ch <= 64)
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idx = ((ch-34)/2 + 3 + 18);
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else if (ch >= 100 && ch <= 140)
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idx = ((ch-100)/4 + 15 + 18);
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else if (ch >= 149 && ch <= 165)
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idx = ((ch-149)/4 + 26 + 18);
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else
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idx = -1;
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break;
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case IEEE80211_BAND_2GHZ:
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if (ch >= 1 && ch <= 14)
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idx = ch - 1;
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else
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idx = -1;
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break;
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default:
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wl1271_error("get reg conf ch idx - unknown band: %d",
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(int)band);
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}
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return idx;
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}
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void wlcore_set_pending_regdomain_ch(struct wl1271 *wl, u16 channel,
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enum ieee80211_band band)
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{
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int ch_bit_idx = 0;
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if (!(wl->quirks & WLCORE_QUIRK_REGDOMAIN_CONF))
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return;
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ch_bit_idx = wlcore_get_reg_conf_ch_idx(band, channel);
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if (ch_bit_idx > 0 && ch_bit_idx <= WL1271_MAX_CHANNELS)
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set_bit(ch_bit_idx, (long *)wl->reg_ch_conf_pending);
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}
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int wlcore_cmd_regdomain_config_locked(struct wl1271 *wl)
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{
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struct wl12xx_cmd_regdomain_dfs_config *cmd = NULL;
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int ret = 0, i, b, ch_bit_idx;
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struct ieee80211_channel *channel;
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u32 tmp_ch_bitmap[2];
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u16 ch;
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struct wiphy *wiphy = wl->hw->wiphy;
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struct ieee80211_supported_band *band;
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bool timeout = false;
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if (!(wl->quirks & WLCORE_QUIRK_REGDOMAIN_CONF))
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return 0;
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wl1271_debug(DEBUG_CMD, "cmd reg domain config");
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memset(tmp_ch_bitmap, 0, sizeof(tmp_ch_bitmap));
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for (b = IEEE80211_BAND_2GHZ; b <= IEEE80211_BAND_5GHZ; b++) {
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band = wiphy->bands[b];
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for (i = 0; i < band->n_channels; i++) {
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channel = &band->channels[i];
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ch = channel->hw_value;
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if (channel->flags & (IEEE80211_CHAN_DISABLED |
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IEEE80211_CHAN_RADAR |
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IEEE80211_CHAN_PASSIVE_SCAN))
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continue;
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ch_bit_idx = wlcore_get_reg_conf_ch_idx(b, ch);
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if (ch_bit_idx < 0)
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continue;
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set_bit(ch_bit_idx, (long *)tmp_ch_bitmap);
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}
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}
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tmp_ch_bitmap[0] |= wl->reg_ch_conf_pending[0];
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tmp_ch_bitmap[1] |= wl->reg_ch_conf_pending[1];
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if (!memcmp(tmp_ch_bitmap, wl->reg_ch_conf_last, sizeof(tmp_ch_bitmap)))
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goto out;
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cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
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if (!cmd) {
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ret = -ENOMEM;
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goto out;
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}
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cmd->ch_bit_map1 = cpu_to_le32(tmp_ch_bitmap[0]);
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cmd->ch_bit_map2 = cpu_to_le32(tmp_ch_bitmap[1]);
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wl1271_debug(DEBUG_CMD,
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"cmd reg domain bitmap1: 0x%08x, bitmap2: 0x%08x",
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cmd->ch_bit_map1, cmd->ch_bit_map2);
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ret = wl1271_cmd_send(wl, CMD_DFS_CHANNEL_CONFIG, cmd, sizeof(*cmd), 0);
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if (ret < 0) {
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wl1271_error("failed to send reg domain dfs config");
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goto out;
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}
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ret = wl->ops->wait_for_event(wl,
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WLCORE_EVENT_DFS_CONFIG_COMPLETE,
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&timeout);
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if (ret < 0 || timeout) {
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wl1271_error("reg domain conf %serror",
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timeout ? "completion " : "");
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ret = timeout ? -ETIMEDOUT : ret;
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goto out;
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}
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memcpy(wl->reg_ch_conf_last, tmp_ch_bitmap, sizeof(tmp_ch_bitmap));
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memset(wl->reg_ch_conf_pending, 0, sizeof(wl->reg_ch_conf_pending));
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out:
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kfree(cmd);
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return ret;
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}
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int wl12xx_cmd_config_fwlog(struct wl1271 *wl)
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{
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struct wl12xx_cmd_config_fwlog *cmd;
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@ -84,6 +84,9 @@ int wl12xx_croc(struct wl1271 *wl, u8 role_id);
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int wl12xx_cmd_add_peer(struct wl1271 *wl, struct wl12xx_vif *wlvif,
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struct ieee80211_sta *sta, u8 hlid);
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int wl12xx_cmd_remove_peer(struct wl1271 *wl, u8 hlid);
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void wlcore_set_pending_regdomain_ch(struct wl1271 *wl, u16 channel,
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enum ieee80211_band band);
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int wlcore_cmd_regdomain_config_locked(struct wl1271 *wl);
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int wl12xx_cmd_config_fwlog(struct wl1271 *wl);
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int wl12xx_cmd_start_fwlog(struct wl1271 *wl);
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int wl12xx_cmd_stop_fwlog(struct wl1271 *wl);
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@ -623,6 +626,13 @@ enum wl12xx_fwlogger_output {
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WL12XX_FWLOG_OUTPUT_HOST,
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};
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struct wl12xx_cmd_regdomain_dfs_config {
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struct wl1271_cmd_header header;
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__le32 ch_bit_map1;
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__le32 ch_bit_map2;
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} __packed;
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struct wl12xx_cmd_config_fwlog {
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struct wl1271_cmd_header header;
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@ -54,6 +54,7 @@ enum {
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enum wlcore_wait_event {
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WLCORE_EVENT_ROLE_STOP_COMPLETE,
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WLCORE_EVENT_PEER_REMOVE_COMPLETE,
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WLCORE_EVENT_DFS_CONFIG_COMPLETE
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};
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enum {
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@ -681,6 +681,10 @@ int wl1271_hw_init(struct wl1271 *wl)
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if (ret < 0)
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return ret;
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ret = wlcore_cmd_regdomain_config_locked(wl);
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if (ret < 0)
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return ret;
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/* Bluetooth WLAN coexistence */
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ret = wl1271_init_pta(wl);
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if (ret < 0)
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@ -93,6 +93,8 @@ static int wl1271_reg_notify(struct wiphy *wiphy,
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struct ieee80211_supported_band *band;
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struct ieee80211_channel *ch;
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int i;
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struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
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struct wl1271 *wl = hw->priv;
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band = wiphy->bands[IEEE80211_BAND_5GHZ];
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for (i = 0; i < band->n_channels; i++) {
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@ -106,6 +108,9 @@ static int wl1271_reg_notify(struct wiphy *wiphy,
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}
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if (likely(wl->state == WLCORE_STATE_ON))
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wlcore_regdomain_config(wl);
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return 0;
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}
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@ -1900,6 +1905,12 @@ static void wlcore_op_stop_locked(struct wl1271 *wl)
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wl->tx_res_if = NULL;
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kfree(wl->target_mem_map);
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wl->target_mem_map = NULL;
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/*
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* FW channels must be re-calibrated after recovery,
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* clear the last Reg-Domain channel configuration.
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*/
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memset(wl->reg_ch_conf_last, 0, sizeof(wl->reg_ch_conf_last));
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}
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static void wlcore_op_stop(struct ieee80211_hw *hw)
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@ -3284,6 +3295,29 @@ int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
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}
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EXPORT_SYMBOL_GPL(wlcore_set_key);
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void wlcore_regdomain_config(struct wl1271 *wl)
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{
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int ret;
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if (!(wl->quirks & WLCORE_QUIRK_REGDOMAIN_CONF))
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return;
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mutex_lock(&wl->mutex);
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ret = wl1271_ps_elp_wakeup(wl);
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if (ret < 0)
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goto out;
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ret = wlcore_cmd_regdomain_config_locked(wl);
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if (ret < 0) {
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wl12xx_queue_recovery_work(wl);
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goto out;
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}
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wl1271_ps_elp_sleep(wl);
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out:
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mutex_unlock(&wl->mutex);
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}
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static int wl1271_op_hw_scan(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct cfg80211_scan_request *req)
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@ -97,6 +97,10 @@ static void wl1271_rx_status(struct wl1271 *wl,
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wl1271_warning("Michael MIC error");
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}
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}
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if (beacon)
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wlcore_set_pending_regdomain_ch(wl, (u16)desc->channel,
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status->band);
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}
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static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
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wl12xx_queue_recovery_work(wl);
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}
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wlcore_cmd_regdomain_config_locked(wl);
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ieee80211_scan_completed(wl->hw, false);
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out:
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@ -284,6 +284,11 @@ struct wl1271 {
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struct work_struct recovery_work;
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bool watchdog_recovery;
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/* Reg domain last configuration */
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u32 reg_ch_conf_last[2];
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/* Reg domain pending configuration */
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u32 reg_ch_conf_pending[2];
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/* Pointer that holds DMA-friendly block for the mailbox */
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void *mbox;
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@ -445,6 +450,7 @@ int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
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struct ieee80211_vif *vif,
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struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key_conf);
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void wlcore_regdomain_config(struct wl1271 *wl);
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static inline void
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wlcore_set_ht_cap(struct wl1271 *wl, enum ieee80211_band band,
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@ -503,6 +509,10 @@ wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
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/* separate probe response templates for one-shot and sched scans */
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#define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10)
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/* Firmware requires reg domain configuration for active calibration */
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#define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11)
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/* TODO: move to the lower drivers when all usages are abstracted */
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#define CHIP_ID_1271_PG10 (0x4030101)
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#define CHIP_ID_1271_PG20 (0x4030111)
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