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dt-bindings: riscv: convert pwm bindings to json-schema

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Convert device tree bindings for SiFive's PWM controller to YAML
format.

Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/r/1601393531-2402-4-git-send-email-sagar.kadam@sifive.com
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Sagar Kadam 2020-09-29 21:02:11 +05:30 committed by Rob Herring
parent c825a081c1
commit 6b49329ae6
2 changed files with 69 additions and 33 deletions
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33
Documentation/devicetree/bindings/pwm/pwm-sifive.txt
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SiFive PWM controller
Unlike most other PWM controllers, the SiFive PWM controller currently only
supports one period for all channels in the PWM. All PWMs need to run at
the same period. The period also has significant restrictions on the values
it can achieve, which the driver rounds to the nearest achievable period.
PWM RTL that corresponds to the IP block version numbers can be found
here:
https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
Required properties:
- compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>".
Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive
PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
SiFive PWM v0 IP block with no chip integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details.
- reg: physical base address and length of the controller's registers
- clocks: Should contain a clock identifier for the PWM's parent clock.
- #pwm-cells: Should be 3. See pwm.yaml in this directory
for a description of the cell format.
- interrupts: one interrupt per PWM channel
Examples:
pwm: pwm@10020000 {
compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
reg = <0x0 0x10020000 0x0 0x1000>;
clocks = <&tlclk>;
interrupt-parent = <&plic>;
interrupts = <42 43 44 45>;
#pwm-cells = <3>;
};

69
Documentation/devicetree/bindings/pwm/pwm-sifive.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 SiFive, Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SiFive PWM controller
maintainers:
- Yash Shah <yash.shah@sifive.com>
- Sagar Kadam <sagar.kadam@sifive.com>
- Paul Walmsley <paul.walmsley@sifive.com>
description:
Unlike most other PWM controllers, the SiFive PWM controller currently
only supports one period for all channels in the PWM. All PWMs need to
run at the same period. The period also has significant restrictions on
the values it can achieve, which the driver rounds to the nearest
achievable period. PWM RTL that corresponds to the IP block version
numbers can be found here -
https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
properties:
compatible:
items:
- const: sifive,fu540-c000-pwm
- const: sifive,pwm0
description:
Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0
as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
SiFive PWM v0 IP block with no chip integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details.
reg:
maxItems: 1
clocks:
maxItems: 1
"#pwm-cells":
const: 3
interrupts:
maxItems: 4
description:
Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
required:
- compatible
- reg
- clocks
- "#pwm-cells"
- interrupts
additionalProperties: false
examples:
- |
pwm: pwm@10020000 {
compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
reg = <0x10020000 0x1000>;
clocks = <&tlclk>;
interrupt-parent = <&plic>;
interrupts = <42>, <43>, <44>, <45>;
#pwm-cells = <3>;
};