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[ARM] S3C: Move S3C2410_EXTINT to common regs-irqtype.h header
Add a common include file (regs-irqtype.h) for the IRQ trigger control register values S3C2410_EXTINT*. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -1053,13 +1053,6 @@
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#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C)
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#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90)
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/* values for S3C2410_EXTINT0/1/2 */
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#define S3C2410_EXTINT_LOWLEV (0x00)
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#define S3C2410_EXTINT_HILEV (0x01)
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#define S3C2410_EXTINT_FALLEDGE (0x02)
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#define S3C2410_EXTINT_RISEEDGE (0x04)
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#define S3C2410_EXTINT_BOTHEDGE (0x06)
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/* interrupt filtering conrrol for EINT16..EINT23 */
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#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94)
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#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98)
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21
arch/arm/plat-s3c/include/plat/regs-irqtype.h
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21
arch/arm/plat-s3c/include/plat/regs-irqtype.h
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/* arch/arm/plat-s3c/include/plat/regs-irqtype.h
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*
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C - IRQ detection types.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* values for S3C2410_EXTINT0/1/2 and other cpus in the series, including
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* the S3C64XX
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*/
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#define S3C2410_EXTINT_LOWLEV (0x00)
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#define S3C2410_EXTINT_HILEV (0x01)
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#define S3C2410_EXTINT_FALLEDGE (0x02)
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#define S3C2410_EXTINT_RISEEDGE (0x04)
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#define S3C2410_EXTINT_BOTHEDGE (0x06)
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@ -62,6 +62,7 @@
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#include <asm/mach/irq.h>
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#include <plat/regs-irqtype.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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