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crypto: cavium/nitrox - fix firmware assignment to AE cores
This patch fixes assigning UCD block number of Asymmetric crypto
firmware to AE cores of CNN55XX device.
Fixes: a7268c4d42
("crypto: cavium/nitrox - Add support for loading asymmetric crypto firmware")
Signed-off-by: Phani Kiran Hemadri <phemadri@marvell.com>
Reviewed-by: Srikanth Jampala <jsrikanth@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -103,8 +103,7 @@ static void write_to_ucd_unit(struct nitrox_device *ndev, u32 ucode_size,
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offset = UCD_UCODE_LOAD_BLOCK_NUM;
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nitrox_write_csr(ndev, offset, block_num);
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code_size = ucode_size;
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code_size = roundup(code_size, 8);
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code_size = roundup(ucode_size, 16);
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while (code_size) {
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data = ucode_data[i];
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/* write 8 bytes at a time */
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@ -220,11 +219,11 @@ static int nitrox_load_fw(struct nitrox_device *ndev)
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/* write block number and firmware length
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* bit:<2:0> block number
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* bit:3 is set SE uses 32KB microcode
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* bit:3 is clear SE uses 64KB microcode
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* bit:3 is set AE uses 32KB microcode
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* bit:3 is clear AE uses 64KB microcode
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*/
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core_2_eid_val.value = 0ULL;
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core_2_eid_val.ucode_blk = 0;
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core_2_eid_val.ucode_blk = 2;
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if (ucode_size <= CNN55XX_UCD_BLOCK_SIZE)
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core_2_eid_val.ucode_len = 1;
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else
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