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Allwinner H3/H5 changes for 4.21

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Our usual pull request with the changes shared between the H3 and H5 SoCs.
 
 The major changes for this release are:
   - Addition of the video engine for the H5
   - H3 Camera support
   - New board: Emlid Neutis N5, Mapleboard MP130
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Merge tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Allwinner H3/H5 changes for 4.21

Our usual pull request with the changes shared between the H3 and H5 SoCs.

The major changes for this release are:
  - Addition of the video engine for the H5
  - H3 Camera support
  - New board: Emlid Neutis N5, Mapleboard MP130

* tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h5: Add Video Engine node
  ARM/arm64: dts: allwinner: Move H3/H5 syscon label over to soc-specific nodes
  arm64: dts: allwinner: h5: Add system-control node with SRAM C1
  ARM: dts: sun8i: h3: Fix the system-control register range
  ARM: dts: sun8i: Add the H3/H5 CSI controller
  ARM: dts: sun8i-h3: Add dts for the Mapleboard MP130
  arm64: dts: allwinner: new board - Emlid Neutis N5
  dt-bindings: vendor-prefix: new vendor - Emlid
  ARM: dts: sun8i-h3: add sy8106a to orange pi plus

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-12-12 13:59:58 -08:00
commit 69c5f266d8
10 changed files with 443 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/vendor-prefixes.txt
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@ -113,6 +113,7 @@ edt Emerging Display Technologies
eeti eGalax_eMPIA Technology Inc
elan Elan Microelectronic Corp.
embest Shenzhen Embest Technology Co., Ltd.
emlid Emlid, Ltd.
emmicro EM Microelectronic
emtrion emtrion GmbH
endless Endless Mobile, Inc.

1
arch/arm/boot/dts/Makefile
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@ -1062,6 +1062,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-mapleboard-mp130.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \

153
arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts Normal file
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@ -0,0 +1,153 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Centrum Embedded Systems, Jia-Bin Huang <jb@ces.com.tw>
* Copyright (C) 2018 Jonathan McDowell <noodles@earth.li>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "MapleBoard MP130";
compatible = "mapleboard,mp130", "allwinner,sun8i-h3";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr_led {
label = "mp130:orange:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status_led {
label = "mp130:orange:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
};
};
r_gpio_keys {
compatible = "gpio-keys";
power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
};
user {
label = "user";
linux,code = <BTN_0>;
gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
};
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"LINEIN", "Line In";
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
/* USB VBUS is always on */
status = "okay";
};

20
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
View File

@ -74,6 +74,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&ehci3 {
status = "okay";
};
@ -119,6 +123,22 @@
};
};
&r_i2c {
status = "okay";
reg_vdd_cpux: regulator@65 {
compatible = "silergy,sy8106a";
reg = <0x65>;
regulator-name = "vdd-cpux";
silergy,fixed-microvolt = <1200000>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-ramp-delay = <200>;
regulator-boot-on;
regulator-always-on;
};
};
&usbphy {
usb3_vbus-supply = <&reg_usb3_vbus>;
};

4
arch/arm/boot/dts/sun8i-h3.dtsi
View File

@ -120,9 +120,9 @@
};
soc {
system-control@1c00000 {
syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x30>;
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;

28
arch/arm/boot/dts/sunxi-h3-h5.dtsi
View File

@ -146,12 +146,6 @@
};
};
syscon: syscon@1c00000 {
compatible = "allwinner,sun8i-h3-system-controller",
"syscon";
reg = <0x01c00000 0x1000>;
};
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@ -387,6 +381,13 @@
interrupt-controller;
#interrupt-cells = <3>;
csi_pins: csi {
pins = "PE0", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10",
"PE11";
function = "csi";
};
emac_rgmii_pins: emac0 {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@ -738,6 +739,21 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
csi: camera@1cb0000 {
compatible = "allwinner,sun8i-h3-csi",
"allwinner,sun6i-a31-csi";
reg = <0x01cb0000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CSI>,
<&ccu CLK_CSI_SCLK>,
<&ccu CLK_DRAM_CSI>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_CSI>;
pinctrl-names = "default";
pinctrl-0 = <&csi_pins>;
status = "disabled";
};
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun8i-h3-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";

1
arch/arm64/boot/dts/allwinner/Makefile
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@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb

149
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5-devboard.dts Normal file
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@ -0,0 +1,149 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* DTS for Emlid Neutis N5 Dev board.
*
* Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
*/
/dts-v1/;
#include "sun50i-h5-emlid-neutis-n5.dtsi"
/ {
model = "Emlid Neutis N5 Developer board";
compatible = "emlid,neutis-n5-devboard",
"emlid,neutis-n5",
"allwinner,sun50i-h5";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
status = "okay";
};
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
pinctrl-names = "default";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0x0
1300000 0x1>;
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"LINEIN", "Line In",
"MIC1", "Mic",
"MIC2", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

61
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* DTSI for Emlid Neutis N5 SoM.
*
* Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
};
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};

33
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
View File

@ -94,6 +94,39 @@
};
soc {
syscon: system-control@1c00000 {
compatible = "allwinner,sun50i-h5-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_c1: sram@18000 {
compatible = "mmio-sram";
reg = <0x00018000 0x1c000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00018000 0x1c000>;
ve_sram: sram-section@0 {
compatible = "allwinner,sun50i-h5-sram-c1",
"allwinner,sun4i-a10-sram-c1";
reg = <0x000000 0x1c000>;
};
};
};
video-codec@1c0e000 {
compatible = "allwinner,sun50i-h5-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
mali: gpu@1e80000 {
compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
reg = <0x01e80000 0x30000>;