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clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks

HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Andrzej Hajda 2015-10-20 11:22:32 +02:00 committed by Sylwester Nawrocki
parent 92e963f50f
commit 68b2206a57
2 changed files with 8 additions and 3 deletions

View File

@ -2614,8 +2614,10 @@ static struct samsung_fixed_rate_clock disp_fixed_clks[] __initdata = {
FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, CLK_IS_ROOT,
100000000),
/* PHY clocks from HDMI_PHY */
FRATE(0, "phyclk_hdmiphy_tmds_clko_phy", NULL, CLK_IS_ROOT, 300000000),
FRATE(0, "phyclk_hdmiphy_pixel_clko_phy", NULL, CLK_IS_ROOT, 166000000),
FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy",
NULL, CLK_IS_ROOT, 300000000),
FRATE(CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY, "phyclk_hdmiphy_pixel_clko_phy",
NULL, CLK_IS_ROOT, 166000000),
};
static struct samsung_mux_clock disp_mux_clks[] __initdata = {

View File

@ -765,7 +765,10 @@
#define CLK_SCLK_RGB_VCLK 109
#define CLK_SCLK_RGB_TV_VCLK 110
#define DISP_NR_CLK 111
#define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY 111
#define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY 112
#define DISP_NR_CLK 113
/* CMU_AUD */
#define CLK_MOUT_AUD_PLL_USER 1