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Allwinner H3/H5 changes for 5.2

Browse Source 
Our usual bunch of changes shared between arm and arm64, the most notable
 one being:
   - Fix of improper usage of DT bindings, thanks to the DT validation
   - Add the SID for the H3 and H5
   - New board: RerVision H3-DVK
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Merge tag 'sunxi-h3-h5-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Allwinner H3/H5 changes for 5.2

Our usual bunch of changes shared between arm and arm64, the most notable
one being:
  - Fix of improper usage of DT bindings, thanks to the DT validation
  - Add the SID for the H3 and H5
  - New board: RerVision H3-DVK

* tag 'sunxi-h3-h5-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun8i: mapleboard: Remove cd-inverted
  ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCI
  ARM: dts: sun8i: h3: bluetooth for Banana Pi M2 Zero board
  ARM: dts: sun8i: h3: Add default dr_mode
  ARM: dts: sun8i: h3: Refactor the pinctrl node names
  ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry
  ARM: dts: sunxi: h3/h5: Add device node for SID
  ARM: dts: sun8i-h3: Add support for the RerVision H3-DVK board

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-04-28 12:42:35 -07:00
commit 68a3ead584
28 changed files with 196 additions and 73 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -1094,6 +1094,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-h3-orangepi-zero-plus2.dtb \
sun8i-h3-rervision-dvk.dtb \
sun8i-r16-bananapi-m2m.dtb \
sun8i-r16-nintendo-nes-classic.dtb \
sun8i-r16-nintendo-super-nes-classic.dtb \

20
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
View File

@ -28,7 +28,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pwr_led {
label = "bananapi-m2-zero:red:pwr";
@ -39,7 +38,6 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
sw4 {
label = "power";
@ -67,8 +65,9 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
@ -115,14 +114,27 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_vcc3v3>;
vddio-supply = <&reg_vcc3v3>;
device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
};
};
&usb_otg {

2
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
View File

@ -178,7 +178,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

6
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
View File

@ -142,7 +142,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -193,13 +193,13 @@
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pins_a>;
pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

7
arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
View File

@ -84,15 +84,14 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
@ -120,7 +119,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

3
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
View File

@ -64,7 +64,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
@ -121,7 +120,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};

2
arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
View File

@ -93,7 +93,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};

2
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
View File

@ -105,7 +105,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

2
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
View File

@ -102,7 +102,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
View File

@ -146,7 +146,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -180,7 +180,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
View File

@ -122,7 +122,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -158,7 +158,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

2
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
View File

@ -169,7 +169,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
View File

@ -148,7 +148,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -206,7 +206,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

3
arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
View File

@ -79,7 +79,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
@ -135,6 +134,6 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

114
arch/arm/boot/dts/sun8i-h3-rervision-dvk.dts Normal file
View File

@ -0,0 +1,114 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Bootlin
* Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "RerVision H3-DVK";
compatible = "rervision,h3-dvk", "allwinner,sun8i-h3";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&de {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
status = "okay";
dr_mode = "peripheral";
};
&usbphy {
status = "okay";
};

4
arch/arm/boot/dts/sun8i-h3.dtsi
View File

@ -231,3 +231,7 @@
&rtc {
compatible = "allwinner,sun8i-h3-rtc";
};
&sid {
compatible = "allwinner,sun8i-h3-sid";
};

7
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
View File

@ -69,7 +69,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pwr_led {
label = "bananapi-m2-plus:red:pwr";
@ -80,7 +79,6 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
sw4 {
label = "power";
@ -101,7 +99,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
@ -153,7 +150,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -210,7 +207,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

50
arch/arm/boot/dts/sunxi-h3-h5.dtsi
View File

@ -227,6 +227,11 @@
#size-cells = <0>;
};
sid: eeprom@1c14000 {
/* compatible is in per SoC .dtsi file */
reg = <0x1c14000 0x400>;
};
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x400>;
@ -237,6 +242,7 @@
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
dr_mode = "otg";
status = "disabled";
};
@ -298,7 +304,6 @@
clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
@ -310,7 +315,6 @@
<&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
@ -321,7 +325,6 @@
clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>;
resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
@ -333,7 +336,6 @@
<&ccu CLK_USB_OHCI2>;
resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
@ -344,7 +346,6 @@
clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>;
resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
phys = <&usbphy 3>;
phy-names = "usb";
status = "disabled";
};
@ -356,7 +357,6 @@
<&ccu CLK_USB_OHCI3>;
resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
phys = <&usbphy 3>;
phy-names = "usb";
status = "disabled";
};
@ -381,14 +381,14 @@
interrupt-controller;
#interrupt-cells = <3>;
csi_pins: csi {
csi_pins: csi-pins {
pins = "PE0", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10",
"PE11";
function = "csi";
};
emac_rgmii_pins: emac0 {
emac_rgmii_pins: emac-rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
"PD12", "PD13", "PD15", "PD16", "PD17";
@ -396,22 +396,22 @@
drive-strength = <40>;
};
i2c0_pins: i2c0 {
i2c0_pins: i2c0-pins {
pins = "PA11", "PA12";
function = "i2c0";
};
i2c1_pins: i2c1 {
i2c1_pins: i2c1-pins {
pins = "PA18", "PA19";
function = "i2c1";
};
i2c2_pins: i2c2 {
i2c2_pins: i2c2-pins {
pins = "PE12", "PE13";
function = "i2c2";
};
mmc0_pins: mmc0 {
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
@ -419,7 +419,7 @@
bias-pull-up;
};
mmc1_pins: mmc1 {
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
function = "mmc1";
@ -427,7 +427,7 @@
bias-pull-up;
};
mmc2_8bit_pins: mmc2_8bit {
mmc2_8bit_pins: mmc2-8bit-pins {
pins = "PC5", "PC6", "PC8",
"PC9", "PC10", "PC11",
"PC12", "PC13", "PC14",
@ -437,47 +437,47 @@
bias-pull-up;
};
spdif_tx_pins_a: spdif {
spdif_tx_pin: spdif-tx-pin {
pins = "PA17";
function = "spdif";
};
spi0_pins: spi0 {
spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};
spi1_pins: spi1 {
spi1_pins: spi1-pins {
pins = "PA15", "PA16", "PA14", "PA13";
function = "spi1";
};
uart0_pins_a: uart0 {
uart0_pa_pins: uart0-pa-pins {
pins = "PA4", "PA5";
function = "uart0";
};
uart1_pins: uart1 {
uart1_pins: uart1-pins {
pins = "PG6", "PG7";
function = "uart1";
};
uart1_rts_cts_pins: uart1_rts_cts {
uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
uart2_pins: uart2 {
uart2_pins: uart2-pins {
pins = "PA0", "PA1";
function = "uart2";
};
uart3_pins: uart3 {
uart3_pins: uart3-pins {
pins = "PA13", "PA14";
function = "uart3";
};
uart3_rts_cts_pins: uart3_rts_cts {
uart3_rts_cts_pins: uart3-rts-cts-pins {
pins = "PA15", "PA16";
function = "uart3";
};
@ -855,12 +855,12 @@
interrupt-controller;
#interrupt-cells = <3>;
ir_pins_a: ir {
r_ir_rx_pin: r-ir-rx-pin {
pins = "PL11";
function = "s_cir_rx";
};
r_i2c_pins: r-i2c {
r_i2c_pins: r-i2c-pins {
pins = "PL0", "PL1";
function = "s_i2c";
};

4
arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi
View File

@ -167,7 +167,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -205,7 +205,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

3
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5-devboard.dts
View File

@ -46,7 +46,6 @@
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
pinctrl-names = "default";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
@ -133,7 +132,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

1
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi
View File

@ -21,7 +21,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
};

5
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
View File

@ -78,7 +78,6 @@
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@ -96,7 +95,6 @@
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
pinctrl-names = "default";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
@ -112,7 +110,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
};
@ -191,7 +188,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

2
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
View File

@ -142,7 +142,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
View File

@ -180,7 +180,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -221,7 +221,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
View File

@ -187,7 +187,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -224,7 +224,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
View File

@ -127,7 +127,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

3
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
View File

@ -78,7 +78,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
@ -134,7 +133,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

4
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
View File

@ -209,3 +209,7 @@
&rtc {
compatible = "allwinner,sun50i-h5-rtc";
};
&sid {
compatible = "allwinner,sun50i-h5-sid";
};