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arm64: Rename ARM64_HARDEN_BRANCH_PREDICTOR to ARM64_SPECTRE_V2
For better or worse, the world knows about "Spectre" and not about "Branch predictor hardening". Rename ARM64_HARDEN_BRANCH_PREDICTOR to ARM64_SPECTRE_V2 as part of moving all of the Spectre mitigations into their own little corner. Signed-off-by: Will Deacon <will@kernel.org>
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@ -31,7 +31,7 @@
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#define ARM64_HAS_DCPOP 21
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#define ARM64_SVE 22
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#define ARM64_UNMAP_KERNEL_AT_EL0 23
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#define ARM64_HARDEN_BRANCH_PREDICTOR 24
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#define ARM64_SPECTRE_V2 24
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#define ARM64_HAS_RAS_EXTN 25
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#define ARM64_WORKAROUND_843419 26
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#define ARM64_HAS_CACHE_IDC 27
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@ -435,14 +435,13 @@ static inline int kvm_write_guest_lock(struct kvm *kvm, gpa_t gpa,
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* EL2 vectors can be mapped and rerouted in a number of ways,
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* depending on the kernel configuration and CPU present:
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*
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* - If the CPU has the ARM64_HARDEN_BRANCH_PREDICTOR cap, the
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* hardening sequence is placed in one of the vector slots, which is
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* executed before jumping to the real vectors.
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* - If the CPU is affected by Spectre-v2, the hardening sequence is
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* placed in one of the vector slots, which is executed before jumping
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* to the real vectors.
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*
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* - If the CPU has both the ARM64_HARDEN_EL2_VECTORS cap and the
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* ARM64_HARDEN_BRANCH_PREDICTOR cap, the slot containing the
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* hardening sequence is mapped next to the idmap page, and executed
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* before jumping to the real vectors.
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* - If the CPU also has the ARM64_HARDEN_EL2_VECTORS cap, the slot
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* containing the hardening sequence is mapped next to the idmap page,
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* and executed before jumping to the real vectors.
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*
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* - If the CPU only has the ARM64_HARDEN_EL2_VECTORS cap, then an
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* empty slot is selected, mapped next to the idmap page, and
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@ -464,7 +463,7 @@ static inline void *kvm_get_hyp_vector(void)
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void *vect = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector));
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int slot = -1;
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if (cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR) && data->fn) {
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if (cpus_have_const_cap(ARM64_SPECTRE_V2) && data->fn) {
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vect = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs));
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slot = data->hyp_vectors_slot;
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}
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@ -485,15 +484,15 @@ static inline void *kvm_get_hyp_vector(void)
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static inline int kvm_map_vectors(void)
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{
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/*
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* HBP = ARM64_HARDEN_BRANCH_PREDICTOR
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* SV2 = ARM64_SPECTRE_V2
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* HEL2 = ARM64_HARDEN_EL2_VECTORS
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*
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* !HBP + !HEL2 -> use direct vectors
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* HBP + !HEL2 -> use hardened vectors in place
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* !HBP + HEL2 -> allocate one vector slot and use exec mapping
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* HBP + HEL2 -> use hardened vertors and use exec mapping
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* !SV2 + !HEL2 -> use direct vectors
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* SV2 + !HEL2 -> use hardened vectors in place
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* !SV2 + HEL2 -> allocate one vector slot and use exec mapping
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* SV2 + HEL2 -> use hardened vertors and use exec mapping
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*/
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if (cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR)) {
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if (cpus_have_const_cap(ARM64_SPECTRE_V2)) {
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__kvm_bp_vect_base = kvm_ksym_ref(__bp_harden_hyp_vecs);
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__kvm_bp_vect_base = kern_hyp_va(__kvm_bp_vect_base);
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}
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@ -56,7 +56,7 @@ static inline void arm64_apply_bp_hardening(void)
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{
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struct bp_hardening_data *d;
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if (!cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR))
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if (!cpus_have_const_cap(ARM64_SPECTRE_V2))
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return;
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d = arm64_get_bp_hardening_data();
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@ -877,7 +877,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
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#endif
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{
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.desc = "Branch predictor hardening",
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.capability = ARM64_HARDEN_BRANCH_PREDICTOR,
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.capability = ARM64_SPECTRE_V2,
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.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
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.matches = check_branch_predictor,
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.cpu_enable = cpu_enable_branch_predictor_hardening,
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