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ARM: mxs: add ocotp read function
Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -2,6 +2,9 @@ if ARCH_MXS
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source "arch/arm/mach-mxs/devices/Kconfig"
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config MXS_OCOTP
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bool
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config SOC_IMX23
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bool
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select CPU_ARM926T
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@ -26,6 +29,7 @@ config MACH_MX28EVK
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select SOC_IMX28
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select MXS_HAVE_AMBA_DUART
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select MXS_HAVE_PLATFORM_FEC
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select MXS_OCOTP
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default y
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help
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Include support for MX28EVK platform. This includes specific
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@ -1,6 +1,8 @@
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# Common support
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obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
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obj-$(CONFIG_MXS_OCOTP) += ocotp.o
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obj-$(CONFIG_SOC_IMX23) += clock-mx23.o mm-mx23.o
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obj-$(CONFIG_SOC_IMX28) += clock-mx28.o mm-mx28.o
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@ -13,6 +13,7 @@
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struct clk;
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extern const u32 *mxs_get_ocotp(void);
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extern int mxs_reset_block(void __iomem *);
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extern void mxs_timer_init(struct clk *, int);
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90
arch/arm/mach-mxs/ocotp.c
Normal file
90
arch/arm/mach-mxs/ocotp.c
Normal file
@ -0,0 +1,90 @@
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/*
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* Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <mach/mxs.h>
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#define OCOTP_WORD_OFFSET 0x20
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#define OCOTP_WORD_COUNT 0x20
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#define BM_OCOTP_CTRL_BUSY (1 << 8)
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#define BM_OCOTP_CTRL_ERROR (1 << 9)
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#define BM_OCOTP_CTRL_RD_BANK_OPEN (1 << 12)
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static DEFINE_MUTEX(ocotp_mutex);
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static u32 ocotp_words[OCOTP_WORD_COUNT];
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const u32 *mxs_get_ocotp(void)
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{
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void __iomem *ocotp_base = MXS_IO_ADDRESS(MXS_OCOTP_BASE_ADDR);
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int timeout = 0x400;
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size_t i;
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static int once = 0;
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if (once)
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return ocotp_words;
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mutex_lock(&ocotp_mutex);
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/*
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* clk_enable(hbus_clk) for ocotp can be skipped
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* as it must be on when system is running.
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*/
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/* try to clear ERROR bit */
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__mxs_clrl(BM_OCOTP_CTRL_ERROR, ocotp_base);
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/* check both BUSY and ERROR cleared */
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while ((__raw_readl(ocotp_base) &
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(BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)) && --timeout)
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cpu_relax();
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if (unlikely(!timeout))
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goto error_unlock;
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/* open OCOTP banks for read */
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__mxs_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base);
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/* approximately wait 32 hclk cycles */
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udelay(1);
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/* poll BUSY bit becoming cleared */
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timeout = 0x400;
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while ((__raw_readl(ocotp_base) & BM_OCOTP_CTRL_BUSY) && --timeout)
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cpu_relax();
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if (unlikely(!timeout))
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goto error_unlock;
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for (i = 0; i < OCOTP_WORD_COUNT; i++)
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ocotp_words[i] = __raw_readl(ocotp_base + OCOTP_WORD_OFFSET +
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i * 0x10);
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/* close banks for power saving */
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__mxs_clrl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base);
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once = 1;
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mutex_unlock(&ocotp_mutex);
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return ocotp_words;
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error_unlock:
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mutex_unlock(&ocotp_mutex);
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pr_err("%s: timeout in reading OCOTP\n", __func__);
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return NULL;
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}
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