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staging: fsl-mc: Added generic MSI support for FSL-MC devices
Created an MSI domain for the fsl-mc bus-- including functions to create a domain, find a domain, alloc/free domain irqs, and bus specific overrides for domain and irq_chip ops. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
J. German Rivera
Greg Kroah-Hartman
parent
550308e48c
commit
679c2c758c
@ -9,6 +9,7 @@
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config FSL_MC_BUS
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tristate "Freescale Management Complex (MC) bus driver"
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depends on OF && ARM64
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select GENERIC_MSI_IRQ_DOMAIN
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help
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Driver to enable the bus infrastructure for the Freescale
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QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware
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@ -13,5 +13,6 @@ mc-bus-driver-objs := mc-bus.o \
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dpmng.o \
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dprc-driver.o \
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mc-allocator.o \
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mc-msi.o \
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dpmcp.o \
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dpbp.o
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276
drivers/staging/fsl-mc/bus/mc-msi.c
Normal file
276
drivers/staging/fsl-mc/bus/mc-msi.c
Normal file
@ -0,0 +1,276 @@
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/*
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* Freescale Management Complex (MC) bus driver MSI support
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*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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* Author: German Rivera <German.Rivera@freescale.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include "../include/mc-private.h"
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/irqchip/arm-gic-v3.h>
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#include <linux/of_irq.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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#include "../include/mc-sys.h"
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#include "dprc-cmd.h"
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static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg,
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struct msi_desc *desc)
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{
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arg->desc = desc;
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arg->hwirq = (irq_hw_number_t)desc->fsl_mc.msi_index;
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}
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static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info)
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{
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struct msi_domain_ops *ops = info->ops;
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if (WARN_ON(!ops))
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return;
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/*
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* set_desc should not be set by the caller
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*/
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if (WARN_ON(ops->set_desc))
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return;
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ops->set_desc = fsl_mc_msi_set_desc;
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}
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static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev,
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struct fsl_mc_device_irq *mc_dev_irq)
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{
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int error;
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struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev;
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struct msi_desc *msi_desc = mc_dev_irq->msi_desc;
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struct dprc_irq_cfg irq_cfg;
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/*
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* msi_desc->msg.address is 0x0 when this function is invoked in
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* the free_irq() code path. In this case, for the MC, we don't
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* really need to "unprogram" the MSI, so we just return.
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*/
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if (msi_desc->msg.address_lo == 0x0 && msi_desc->msg.address_hi == 0x0)
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return;
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if (WARN_ON(!owner_mc_dev))
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return;
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irq_cfg.paddr = ((u64)msi_desc->msg.address_hi << 32) |
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msi_desc->msg.address_lo;
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irq_cfg.val = msi_desc->msg.data;
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irq_cfg.user_irq_id = msi_desc->irq;
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if (owner_mc_dev == mc_bus_dev) {
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/*
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* IRQ is for the mc_bus_dev's DPRC itself
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*/
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error = dprc_set_irq(mc_bus_dev->mc_io,
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MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
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mc_bus_dev->mc_handle,
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mc_dev_irq->dev_irq_index,
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&irq_cfg);
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if (error < 0) {
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dev_err(&owner_mc_dev->dev,
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"dprc_set_irq() failed: %d\n", error);
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}
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} else {
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/*
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* IRQ is for for a child device of mc_bus_dev
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*/
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error = dprc_set_obj_irq(mc_bus_dev->mc_io,
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MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
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mc_bus_dev->mc_handle,
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owner_mc_dev->obj_desc.type,
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owner_mc_dev->obj_desc.id,
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mc_dev_irq->dev_irq_index,
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&irq_cfg);
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if (error < 0) {
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dev_err(&owner_mc_dev->dev,
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"dprc_obj_set_irq() failed: %d\n", error);
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}
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}
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}
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/*
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* NOTE: This function is invoked with interrupts disabled
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*/
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static void fsl_mc_msi_write_msg(struct irq_data *irq_data,
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struct msi_msg *msg)
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{
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struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data);
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struct fsl_mc_device *mc_bus_dev = to_fsl_mc_device(msi_desc->dev);
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struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
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struct fsl_mc_device_irq *mc_dev_irq =
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&mc_bus->irq_resources[msi_desc->fsl_mc.msi_index];
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WARN_ON(mc_dev_irq->msi_desc != msi_desc);
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msi_desc->msg = *msg;
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/*
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* Program the MSI (paddr, value) pair in the device:
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*/
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__fsl_mc_msi_write_msg(mc_bus_dev, mc_dev_irq);
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}
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static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info)
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{
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struct irq_chip *chip = info->chip;
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if (WARN_ON((!chip)))
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return;
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/*
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* irq_write_msi_msg should not be set by the caller
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*/
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if (WARN_ON(chip->irq_write_msi_msg))
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return;
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chip->irq_write_msi_msg = fsl_mc_msi_write_msg;
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}
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/**
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* fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain
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* @np: Optional device-tree node of the interrupt controller
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* @info: MSI domain info
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* @parent: Parent irq domain
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*
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* Updates the domain and chip ops and creates a fsl-mc MSI
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* interrupt domain.
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*
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* Returns:
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* A domain pointer or NULL in case of failure.
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*/
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struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode,
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struct msi_domain_info *info,
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struct irq_domain *parent)
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{
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struct irq_domain *domain;
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if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
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fsl_mc_msi_update_dom_ops(info);
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if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
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fsl_mc_msi_update_chip_ops(info);
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domain = msi_create_irq_domain(fwnode, info, parent);
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if (domain)
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domain->bus_token = DOMAIN_BUS_FSL_MC_MSI;
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return domain;
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}
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int fsl_mc_find_msi_domain(struct device *mc_platform_dev,
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struct irq_domain **mc_msi_domain)
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{
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struct irq_domain *msi_domain;
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struct device_node *mc_of_node = mc_platform_dev->of_node;
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msi_domain = of_msi_get_domain(mc_platform_dev, mc_of_node,
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DOMAIN_BUS_FSL_MC_MSI);
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if (!msi_domain) {
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pr_err("Unable to find fsl-mc MSI domain for %s\n",
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mc_of_node->full_name);
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return -ENOENT;
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}
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*mc_msi_domain = msi_domain;
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return 0;
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}
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static void fsl_mc_msi_free_descs(struct device *dev)
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{
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struct msi_desc *desc, *tmp;
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list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
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list_del(&desc->list);
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free_msi_entry(desc);
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}
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}
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static int fsl_mc_msi_alloc_descs(struct device *dev, unsigned int irq_count)
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{
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unsigned int i;
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int error;
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struct msi_desc *msi_desc;
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for (i = 0; i < irq_count; i++) {
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msi_desc = alloc_msi_entry(dev);
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if (!msi_desc) {
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dev_err(dev, "Failed to allocate msi entry\n");
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error = -ENOMEM;
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goto cleanup_msi_descs;
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}
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msi_desc->fsl_mc.msi_index = i;
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msi_desc->nvec_used = 1;
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INIT_LIST_HEAD(&msi_desc->list);
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list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
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}
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return 0;
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cleanup_msi_descs:
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fsl_mc_msi_free_descs(dev);
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return error;
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}
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int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
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unsigned int irq_count)
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{
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struct irq_domain *msi_domain;
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int error;
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if (WARN_ON(!list_empty(dev_to_msi_list(dev))))
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return -EINVAL;
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error = fsl_mc_msi_alloc_descs(dev, irq_count);
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if (error < 0)
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return error;
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msi_domain = dev_get_msi_domain(dev);
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if (WARN_ON(!msi_domain)) {
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error = -EINVAL;
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goto cleanup_msi_descs;
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}
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/*
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* NOTE: Calling this function will trigger the invocation of the
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* its_fsl_mc_msi_prepare() callback
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*/
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error = msi_domain_alloc_irqs(msi_domain, dev, irq_count);
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if (error) {
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dev_err(dev, "Failed to allocate IRQs\n");
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goto cleanup_msi_descs;
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}
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return 0;
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cleanup_msi_descs:
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fsl_mc_msi_free_descs(dev);
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return error;
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}
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void fsl_mc_msi_domain_free_irqs(struct device *dev)
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{
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struct irq_domain *msi_domain;
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msi_domain = dev_get_msi_domain(dev);
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if (WARN_ON(!msi_domain))
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return;
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msi_domain_free_irqs(msi_domain, dev);
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if (WARN_ON(list_empty(dev_to_msi_list(dev))))
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return;
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fsl_mc_msi_free_descs(dev);
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}
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@ -176,7 +176,7 @@ int dprc_reset_container(struct fsl_mc_io *mc_io,
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* @user_irq_id: A user defined number associated with this IRQ
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*/
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struct dprc_irq_cfg {
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u64 paddr;
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phys_addr_t paddr;
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u32 val;
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int user_irq_id;
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};
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@ -26,6 +26,9 @@
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strcmp(_obj_type, "dpmcp") == 0 || \
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strcmp(_obj_type, "dpcon") == 0)
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struct irq_domain;
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struct msi_domain_info;
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/**
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* struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
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* @root_mc_bus_dev: MC object device representing the root DPRC
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@ -79,11 +82,13 @@ struct fsl_mc_resource_pool {
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* @resource_pools: array of resource pools (one pool per resource type)
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* for this MC bus. These resources represent allocatable entities
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* from the physical DPRC.
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* @irq_resources: Pointer to array of IRQ objects for the IRQ pool
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* @scan_mutex: Serializes bus scanning
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*/
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struct fsl_mc_bus {
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struct fsl_mc_device mc_dev;
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struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES];
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struct fsl_mc_device_irq *irq_resources;
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struct mutex scan_mutex; /* serializes bus scanning */
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};
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@ -116,4 +121,16 @@ int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
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void fsl_mc_resource_free(struct fsl_mc_resource *resource);
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struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode,
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struct msi_domain_info *info,
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struct irq_domain *parent);
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int fsl_mc_find_msi_domain(struct device *mc_platform_dev,
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struct irq_domain **mc_msi_domain);
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int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
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unsigned int irq_count);
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void fsl_mc_msi_domain_free_irqs(struct device *dev);
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#endif /* _FSL_MC_PRIVATE_H_ */
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@ -103,6 +103,23 @@ struct fsl_mc_resource {
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struct list_head node;
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};
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/**
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* struct fsl_mc_device_irq - MC object device message-based interrupt
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* @msi_desc: pointer to MSI descriptor allocated by fsl_mc_msi_alloc_descs()
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* @mc_dev: MC object device that owns this interrupt
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* @dev_irq_index: device-relative IRQ index
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* @resource: MC generic resource associated with the interrupt
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*/
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struct fsl_mc_device_irq {
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struct msi_desc *msi_desc;
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struct fsl_mc_device *mc_dev;
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u8 dev_irq_index;
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struct fsl_mc_resource resource;
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};
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#define to_fsl_mc_irq(_mc_resource) \
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container_of(_mc_resource, struct fsl_mc_device_irq, resource)
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/**
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* Bit masks for a MC object device (struct fsl_mc_device) flags
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*/
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