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Documentation: bindings: move the Berlin pinctrl documentation

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The Berlin pinctrl documentation was part of the Marvell Berlin SoC
documentation because the Berlin pinctrl configuration was inside the
chip and the system controllers. With the recent rework of the chip and
system controller handling (now an MFD driver registers all sub-devices
of the two soc and system controller nodes and each device has its own
sub-node), the documentation of the Berlin pinctrl driver can be moved
to the generic pinctrl documentation directory.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This commit is contained in:
Antoine Tenart 2015-04-27 21:39:48 +02:00 committed by Sebastian Hesselbarth
parent 185cff3d66
commit 66fa300e60
2 changed files with 43 additions and 37 deletions
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37
Documentation/devicetree/bindings/arm/marvell,berlin.txt
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@ -107,23 +107,6 @@ Clocks provided by core clocks shall be referenced by a clock specifier
indexing one of the provided clocks. Refer to dt-bindings/clock/berlin<soc>.h
for the corresponding index mapping.
* Pin controller binding
Pin control registers are part of both register sets, chip control and system
control. The pins controlled are organized in groups, so no actual pin
information is needed.
A pin-controller node should contain subnodes representing the pin group
configurations, one per function. Each subnode has the group name and the muxing
function used.
Be aware the Marvell Berlin datasheets use the keyword 'mode' for what is called
a 'function' in the pin-controller subsystem.
Required subnode-properties:
- groups: a list of strings describing the group names.
- function: a string describing the function used to mux the groups.
Example:
chip: chip-control@ea0000 {
@ -132,29 +115,9 @@ chip: chip-control@ea0000 {
reg = <0xea0000 0x400>;
clocks = <&refclk>, <&externaldev 0>;
clock-names = "refclk", "video_ext0";
spi1_pmux: spi1-pmux {
groups = "G0";
function = "spi1";
};
};
sysctrl: system-controller@d000 {
compatible = "marvell,berlin2-system-ctrl", "simple-mfd", "syscon";
reg = <0xd000 0x100>;
uart0_pmux: uart0-pmux {
groups = "GSM4";
function = "uart0";
};
uart1_pmux: uart1-pmux {
groups = "GSM5";
function = "uart1";
};
uart2_pmux: uart2-pmux {
groups = "GSM3";
function = "uart2";
};
};

43
Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt Normal file
View File

@ -0,0 +1,43 @@
* Pin-controller driver for the Marvell Berlin SoCs
Pin control registers are part of both chip controller and system
controller register sets. Pin controller nodes should be a sub-node of
either the chip controller or system controller node. The pins
controlled are organized in groups, so no actual pin information is
needed.
A pin-controller node should contain subnodes representing the pin group
configurations, one per function. Each subnode has the group name and
the muxing function used.
Be aware the Marvell Berlin datasheets use the keyword 'mode' for what
is called a 'function' in the pin-controller subsystem.
Required properties:
- compatible: should be one of:
"marvell,berlin2-soc-pinctrl",
"marvell,berlin2-system-pinctrl",
"marvell,berlin2cd-soc-pinctrl",
"marvell,berlin2cd-system-pinctrl",
"marvell,berlin2q-soc-pinctrl",
"marvell,berlin2q-system-pinctrl"
Required subnode-properties:
- groups: a list of strings describing the group names.
- function: a string describing the function used to mux the groups.
Example:
sys_pinctrl: pin-controller {
compatible = "marvell,berlin2q-system-pinctrl";
uart0_pmux: uart0-pmux {
groups = "GSM12";
function = "uart0";
};
};
&uart0 {
pinctrl-0 = <&uart0_pmux>;
pinctrl-names = "default";
};