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clk: sunxi-ng: Fix wrong reset register offsets
The reset register offsets for UART*, I2C* and SCR were off by a few bytes. Signed-off-by: Jorik Jonker <jorik@kippendief.biz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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06421a7821
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6654674cb7
@ -783,14 +783,14 @@ static struct ccu_reset_map sun8i_h3_ccu_resets[] = {
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[RST_BUS_I2S1] = { 0x2d0, BIT(13) },
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[RST_BUS_I2S1] = { 0x2d0, BIT(13) },
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[RST_BUS_I2S2] = { 0x2d0, BIT(14) },
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[RST_BUS_I2S2] = { 0x2d0, BIT(14) },
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[RST_BUS_I2C0] = { 0x2d4, BIT(0) },
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[RST_BUS_I2C0] = { 0x2d8, BIT(0) },
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[RST_BUS_I2C1] = { 0x2d4, BIT(1) },
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[RST_BUS_I2C1] = { 0x2d8, BIT(1) },
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[RST_BUS_I2C2] = { 0x2d4, BIT(2) },
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[RST_BUS_I2C2] = { 0x2d8, BIT(2) },
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[RST_BUS_UART0] = { 0x2d4, BIT(16) },
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[RST_BUS_UART0] = { 0x2d8, BIT(16) },
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[RST_BUS_UART1] = { 0x2d4, BIT(17) },
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[RST_BUS_UART1] = { 0x2d8, BIT(17) },
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[RST_BUS_UART2] = { 0x2d4, BIT(18) },
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[RST_BUS_UART2] = { 0x2d8, BIT(18) },
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[RST_BUS_UART3] = { 0x2d4, BIT(19) },
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[RST_BUS_UART3] = { 0x2d8, BIT(19) },
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[RST_BUS_SCR] = { 0x2d4, BIT(20) },
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[RST_BUS_SCR] = { 0x2d8, BIT(20) },
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};
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};
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static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
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static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
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