mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 12:14:01 +08:00
KVM: x86: save/load state on SMM switch
The big ugly one. This patch adds support for switching in and out of system management mode, respectively upon receiving KVM_REQ_SMI and upon executing a RSM instruction. Both 32- and 64-bit formats are supported for the SMM state save area. Reviewed-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
cd7764fe9f
commit
660a5d517a
@ -70,6 +70,14 @@ static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
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return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
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}
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static inline bool guest_cpuid_has_longmode(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
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return best && (best->edx & bit(X86_FEATURE_LM));
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}
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static inline bool guest_cpuid_has_osvw(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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@ -2259,12 +2259,258 @@ static int em_lseg(struct x86_emulate_ctxt *ctxt)
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return rc;
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}
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static int emulator_has_longmode(struct x86_emulate_ctxt *ctxt)
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{
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u32 eax, ebx, ecx, edx;
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eax = 0x80000001;
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ecx = 0;
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ctxt->ops->get_cpuid(ctxt, &eax, &ebx, &ecx, &edx);
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return edx & bit(X86_FEATURE_LM);
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}
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#define GET_SMSTATE(type, smbase, offset) \
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({ \
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type __val; \
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int r = ctxt->ops->read_std(ctxt, smbase + offset, &__val, \
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sizeof(__val), NULL); \
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if (r != X86EMUL_CONTINUE) \
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return X86EMUL_UNHANDLEABLE; \
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__val; \
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})
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static void rsm_set_desc_flags(struct desc_struct *desc, u32 flags)
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{
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desc->g = (flags >> 23) & 1;
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desc->d = (flags >> 22) & 1;
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desc->l = (flags >> 21) & 1;
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desc->avl = (flags >> 20) & 1;
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desc->p = (flags >> 15) & 1;
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desc->dpl = (flags >> 13) & 3;
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desc->s = (flags >> 12) & 1;
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desc->type = (flags >> 8) & 15;
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}
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static int rsm_load_seg_32(struct x86_emulate_ctxt *ctxt, u64 smbase, int n)
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{
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struct desc_struct desc;
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int offset;
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u16 selector;
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selector = GET_SMSTATE(u32, smbase, 0x7fa8 + n * 4);
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if (n < 3)
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offset = 0x7f84 + n * 12;
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else
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offset = 0x7f2c + (n - 3) * 12;
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, offset + 8));
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, offset + 4));
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smbase, offset));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, n);
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return X86EMUL_CONTINUE;
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}
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static int rsm_load_seg_64(struct x86_emulate_ctxt *ctxt, u64 smbase, int n)
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{
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struct desc_struct desc;
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int offset;
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u16 selector;
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u32 base3;
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offset = 0x7e00 + n * 16;
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selector = GET_SMSTATE(u16, smbase, offset);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u16, smbase, offset + 2) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, offset + 4));
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, offset + 8));
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base3 = GET_SMSTATE(u32, smbase, offset + 12);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, n);
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return X86EMUL_CONTINUE;
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}
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static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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u64 cr0, u64 cr4)
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{
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int bad;
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/*
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* First enable PAE, long mode needs it before CR0.PG = 1 is set.
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* Then enable protected mode. However, PCID cannot be enabled
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* if EFER.LMA=0, so set it separately.
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*/
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bad = ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PCIDE);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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bad = ctxt->ops->set_cr(ctxt, 0, cr0);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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if (cr4 & X86_CR4_PCIDE) {
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bad = ctxt->ops->set_cr(ctxt, 4, cr4);
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if (bad)
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return X86EMUL_UNHANDLEABLE;
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}
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return X86EMUL_CONTINUE;
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}
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static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt, u64 smbase)
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{
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struct desc_struct desc;
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struct desc_ptr dt;
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u16 selector;
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u32 val, cr0, cr4;
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int i;
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cr0 = GET_SMSTATE(u32, smbase, 0x7ffc);
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ctxt->ops->set_cr(ctxt, 3, GET_SMSTATE(u32, smbase, 0x7ff8));
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ctxt->eflags = GET_SMSTATE(u32, smbase, 0x7ff4) | X86_EFLAGS_FIXED;
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ctxt->_eip = GET_SMSTATE(u32, smbase, 0x7ff0);
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for (i = 0; i < 8; i++)
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*reg_write(ctxt, i) = GET_SMSTATE(u32, smbase, 0x7fd0 + i * 4);
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val = GET_SMSTATE(u32, smbase, 0x7fcc);
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ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1);
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val = GET_SMSTATE(u32, smbase, 0x7fc8);
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ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1);
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selector = GET_SMSTATE(u32, smbase, 0x7fc4);
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, 0x7f64));
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, 0x7f60));
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smbase, 0x7f5c));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_TR);
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selector = GET_SMSTATE(u32, smbase, 0x7fc0);
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, 0x7f80));
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, 0x7f7c));
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smbase, 0x7f78));
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_LDTR);
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dt.address = GET_SMSTATE(u32, smbase, 0x7f74);
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dt.size = GET_SMSTATE(u32, smbase, 0x7f70);
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ctxt->ops->set_gdt(ctxt, &dt);
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dt.address = GET_SMSTATE(u32, smbase, 0x7f58);
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dt.size = GET_SMSTATE(u32, smbase, 0x7f54);
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ctxt->ops->set_idt(ctxt, &dt);
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for (i = 0; i < 6; i++) {
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int r = rsm_load_seg_32(ctxt, smbase, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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cr4 = GET_SMSTATE(u32, smbase, 0x7f14);
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ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smbase, 0x7ef8));
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return rsm_enter_protected_mode(ctxt, cr0, cr4);
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}
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static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase)
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{
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struct desc_struct desc;
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struct desc_ptr dt;
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u64 val, cr0, cr4;
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u32 base3;
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u16 selector;
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int i;
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for (i = 0; i < 16; i++)
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*reg_write(ctxt, i) = GET_SMSTATE(u64, smbase, 0x7ff8 - i * 8);
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ctxt->_eip = GET_SMSTATE(u64, smbase, 0x7f78);
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ctxt->eflags = GET_SMSTATE(u32, smbase, 0x7f70) | X86_EFLAGS_FIXED;
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val = GET_SMSTATE(u32, smbase, 0x7f68);
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ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1);
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val = GET_SMSTATE(u32, smbase, 0x7f60);
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ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1);
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cr0 = GET_SMSTATE(u64, smbase, 0x7f58);
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ctxt->ops->set_cr(ctxt, 3, GET_SMSTATE(u64, smbase, 0x7f50));
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cr4 = GET_SMSTATE(u64, smbase, 0x7f48);
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ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smbase, 0x7f00));
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val = GET_SMSTATE(u64, smbase, 0x7ed0);
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ctxt->ops->set_msr(ctxt, MSR_EFER, val & ~EFER_LMA);
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selector = GET_SMSTATE(u32, smbase, 0x7e90);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smbase, 0x7e92) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, 0x7e94));
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, 0x7e98));
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base3 = GET_SMSTATE(u32, smbase, 0x7e9c);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, VCPU_SREG_TR);
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dt.size = GET_SMSTATE(u32, smbase, 0x7e84);
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dt.address = GET_SMSTATE(u64, smbase, 0x7e88);
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ctxt->ops->set_idt(ctxt, &dt);
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selector = GET_SMSTATE(u32, smbase, 0x7e70);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smbase, 0x7e72) << 8);
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set_desc_limit(&desc, GET_SMSTATE(u32, smbase, 0x7e74));
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set_desc_base(&desc, GET_SMSTATE(u32, smbase, 0x7e78));
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base3 = GET_SMSTATE(u32, smbase, 0x7e7c);
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ctxt->ops->set_segment(ctxt, selector, &desc, base3, VCPU_SREG_LDTR);
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dt.size = GET_SMSTATE(u32, smbase, 0x7e64);
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dt.address = GET_SMSTATE(u64, smbase, 0x7e68);
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ctxt->ops->set_gdt(ctxt, &dt);
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for (i = 0; i < 6; i++) {
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int r = rsm_load_seg_64(ctxt, smbase, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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return rsm_enter_protected_mode(ctxt, cr0, cr4);
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}
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static int em_rsm(struct x86_emulate_ctxt *ctxt)
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{
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unsigned long cr0, cr4, efer;
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u64 smbase;
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int ret;
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if ((ctxt->emul_flags & X86EMUL_SMM_MASK) == 0)
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return emulate_ud(ctxt);
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return X86EMUL_UNHANDLEABLE;
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/*
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* Get back to real mode, to prepare a safe state in which to load
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* CR0/CR3/CR4/EFER. Also this will ensure that addresses passed
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* to read_std/write_std are not virtual.
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*
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* CR4.PCIDE must be zero, because it is a 64-bit mode only feature.
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*/
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cr0 = ctxt->ops->get_cr(ctxt, 0);
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if (cr0 & X86_CR0_PE)
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ctxt->ops->set_cr(ctxt, 0, cr0 & ~(X86_CR0_PG | X86_CR0_PE));
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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if (cr4 & X86_CR4_PAE)
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ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PAE);
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efer = 0;
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ctxt->ops->set_msr(ctxt, MSR_EFER, efer);
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smbase = ctxt->ops->get_smbase(ctxt);
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if (emulator_has_longmode(ctxt))
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ret = rsm_load_state_64(ctxt, smbase + 0x8000);
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else
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ret = rsm_load_state_32(ctxt, smbase + 0x8000);
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if (ret != X86EMUL_CONTINUE) {
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/* FIXME: should triple fault */
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return X86EMUL_UNHANDLEABLE;
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}
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if ((ctxt->emul_flags & X86EMUL_SMM_INSIDE_NMI_MASK) == 0)
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ctxt->ops->set_nmi_mask(ctxt, false);
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ctxt->emul_flags &= ~X86EMUL_SMM_INSIDE_NMI_MASK;
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ctxt->emul_flags &= ~X86EMUL_SMM_MASK;
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return X86EMUL_CONTINUE;
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}
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static void
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@ -952,6 +952,28 @@ TRACE_EVENT(kvm_wait_lapic_expire,
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__entry->delta < 0 ? "early" : "late")
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);
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TRACE_EVENT(kvm_enter_smm,
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TP_PROTO(unsigned int vcpu_id, u64 smbase, bool entering),
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TP_ARGS(vcpu_id, smbase, entering),
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TP_STRUCT__entry(
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__field( unsigned int, vcpu_id )
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__field( u64, smbase )
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__field( bool, entering )
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),
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TP_fast_assign(
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__entry->vcpu_id = vcpu_id;
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__entry->smbase = smbase;
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__entry->entering = entering;
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),
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TP_printk("vcpu %u: %s SMM, smbase 0x%llx",
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__entry->vcpu_id,
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__entry->entering ? "entering" : "leaving",
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__entry->smbase)
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);
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#endif /* _TRACE_KVM_H */
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#undef TRACE_INCLUDE_PATH
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@ -5479,6 +5479,9 @@ static int complete_emulated_pio(struct kvm_vcpu *vcpu);
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static void kvm_smm_changed(struct kvm_vcpu *vcpu)
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{
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if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
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/* This is a good place to trace that we are exiting SMM. */
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trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
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if (unlikely(vcpu->arch.smi_pending)) {
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kvm_make_request(KVM_REQ_SMI, vcpu);
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vcpu->arch.smi_pending = 0;
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@ -6390,14 +6393,231 @@ static void process_nmi(struct kvm_vcpu *vcpu)
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kvm_make_request(KVM_REQ_EVENT, vcpu);
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}
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#define put_smstate(type, buf, offset, val) \
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*(type *)((buf) + (offset) - 0x7e00) = val
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static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
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{
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u32 flags = 0;
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flags |= seg->g << 23;
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flags |= seg->db << 22;
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flags |= seg->l << 21;
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flags |= seg->avl << 20;
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flags |= seg->present << 15;
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flags |= seg->dpl << 13;
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flags |= seg->s << 12;
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flags |= seg->type << 8;
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return flags;
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}
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static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
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{
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struct kvm_segment seg;
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int offset;
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kvm_get_segment(vcpu, &seg, n);
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put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
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if (n < 3)
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offset = 0x7f84 + n * 12;
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else
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offset = 0x7f2c + (n - 3) * 12;
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put_smstate(u32, buf, offset + 8, seg.base);
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put_smstate(u32, buf, offset + 4, seg.limit);
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put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
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}
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static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
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{
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struct kvm_segment seg;
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int offset;
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u16 flags;
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kvm_get_segment(vcpu, &seg, n);
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offset = 0x7e00 + n * 16;
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flags = process_smi_get_segment_flags(&seg) >> 8;
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put_smstate(u16, buf, offset, seg.selector);
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put_smstate(u16, buf, offset + 2, flags);
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put_smstate(u32, buf, offset + 4, seg.limit);
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put_smstate(u64, buf, offset + 8, seg.base);
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}
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static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
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{
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struct desc_ptr dt;
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struct kvm_segment seg;
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unsigned long val;
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int i;
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put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
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put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
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put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
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put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
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for (i = 0; i < 8; i++)
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put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
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kvm_get_dr(vcpu, 6, &val);
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put_smstate(u32, buf, 0x7fcc, (u32)val);
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kvm_get_dr(vcpu, 7, &val);
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put_smstate(u32, buf, 0x7fc8, (u32)val);
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kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
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put_smstate(u32, buf, 0x7fc4, seg.selector);
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put_smstate(u32, buf, 0x7f64, seg.base);
|
||||
put_smstate(u32, buf, 0x7f60, seg.limit);
|
||||
put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
|
||||
|
||||
kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
|
||||
put_smstate(u32, buf, 0x7fc0, seg.selector);
|
||||
put_smstate(u32, buf, 0x7f80, seg.base);
|
||||
put_smstate(u32, buf, 0x7f7c, seg.limit);
|
||||
put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
|
||||
|
||||
kvm_x86_ops->get_gdt(vcpu, &dt);
|
||||
put_smstate(u32, buf, 0x7f74, dt.address);
|
||||
put_smstate(u32, buf, 0x7f70, dt.size);
|
||||
|
||||
kvm_x86_ops->get_idt(vcpu, &dt);
|
||||
put_smstate(u32, buf, 0x7f58, dt.address);
|
||||
put_smstate(u32, buf, 0x7f54, dt.size);
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
process_smi_save_seg_32(vcpu, buf, i);
|
||||
|
||||
put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
|
||||
|
||||
/* revision id */
|
||||
put_smstate(u32, buf, 0x7efc, 0x00020000);
|
||||
put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
|
||||
}
|
||||
|
||||
static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
|
||||
{
|
||||
#ifdef CONFIG_X86_64
|
||||
struct desc_ptr dt;
|
||||
struct kvm_segment seg;
|
||||
unsigned long val;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
|
||||
|
||||
put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
|
||||
put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
|
||||
|
||||
kvm_get_dr(vcpu, 6, &val);
|
||||
put_smstate(u64, buf, 0x7f68, val);
|
||||
kvm_get_dr(vcpu, 7, &val);
|
||||
put_smstate(u64, buf, 0x7f60, val);
|
||||
|
||||
put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
|
||||
put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
|
||||
put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
|
||||
|
||||
put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
|
||||
|
||||
/* revision id */
|
||||
put_smstate(u32, buf, 0x7efc, 0x00020064);
|
||||
|
||||
put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
|
||||
|
||||
kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
|
||||
put_smstate(u16, buf, 0x7e90, seg.selector);
|
||||
put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
|
||||
put_smstate(u32, buf, 0x7e94, seg.limit);
|
||||
put_smstate(u64, buf, 0x7e98, seg.base);
|
||||
|
||||
kvm_x86_ops->get_idt(vcpu, &dt);
|
||||
put_smstate(u32, buf, 0x7e84, dt.size);
|
||||
put_smstate(u64, buf, 0x7e88, dt.address);
|
||||
|
||||
kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
|
||||
put_smstate(u16, buf, 0x7e70, seg.selector);
|
||||
put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
|
||||
put_smstate(u32, buf, 0x7e74, seg.limit);
|
||||
put_smstate(u64, buf, 0x7e78, seg.base);
|
||||
|
||||
kvm_x86_ops->get_gdt(vcpu, &dt);
|
||||
put_smstate(u32, buf, 0x7e64, dt.size);
|
||||
put_smstate(u64, buf, 0x7e68, dt.address);
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
process_smi_save_seg_64(vcpu, buf, i);
|
||||
#else
|
||||
WARN_ON_ONCE(1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void process_smi(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_segment cs, ds;
|
||||
char buf[512];
|
||||
u32 cr0;
|
||||
|
||||
if (is_smm(vcpu)) {
|
||||
vcpu->arch.smi_pending = true;
|
||||
return;
|
||||
}
|
||||
|
||||
printk_once(KERN_DEBUG "Ignoring guest SMI\n");
|
||||
trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
|
||||
vcpu->arch.hflags |= HF_SMM_MASK;
|
||||
memset(buf, 0, 512);
|
||||
if (guest_cpuid_has_longmode(vcpu))
|
||||
process_smi_save_state_64(vcpu, buf);
|
||||
else
|
||||
process_smi_save_state_32(vcpu, buf);
|
||||
|
||||
kvm_write_guest(vcpu->kvm, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
|
||||
|
||||
if (kvm_x86_ops->get_nmi_mask(vcpu))
|
||||
vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
|
||||
else
|
||||
kvm_x86_ops->set_nmi_mask(vcpu, true);
|
||||
|
||||
kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
|
||||
kvm_rip_write(vcpu, 0x8000);
|
||||
|
||||
cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
|
||||
kvm_x86_ops->set_cr0(vcpu, cr0);
|
||||
vcpu->arch.cr0 = cr0;
|
||||
|
||||
kvm_x86_ops->set_cr4(vcpu, 0);
|
||||
|
||||
__kvm_set_dr(vcpu, 7, DR7_FIXED_1);
|
||||
|
||||
cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
|
||||
cs.base = vcpu->arch.smbase;
|
||||
|
||||
ds.selector = 0;
|
||||
ds.base = 0;
|
||||
|
||||
cs.limit = ds.limit = 0xffffffff;
|
||||
cs.type = ds.type = 0x3;
|
||||
cs.dpl = ds.dpl = 0;
|
||||
cs.db = ds.db = 0;
|
||||
cs.s = ds.s = 1;
|
||||
cs.l = ds.l = 0;
|
||||
cs.g = ds.g = 1;
|
||||
cs.avl = ds.avl = 0;
|
||||
cs.present = ds.present = 1;
|
||||
cs.unusable = ds.unusable = 0;
|
||||
cs.padding = ds.padding = 0;
|
||||
|
||||
kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
|
||||
kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
|
||||
kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
|
||||
kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
|
||||
kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
|
||||
kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
|
||||
|
||||
if (guest_cpuid_has_longmode(vcpu))
|
||||
kvm_x86_ops->set_efer(vcpu, 0);
|
||||
|
||||
kvm_update_cpuid(vcpu);
|
||||
kvm_mmu_reset_context(vcpu);
|
||||
}
|
||||
|
||||
static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user